Tunneling transistor memory cell

A two state memory cell comprising:

• a first bipolar transistor having a base, an emitter and a collector;
• a tunnel diode shunted across the base-collector junction of said first bipolar transistor, the anode of said tunnel diode being connected to said base, and the cathode of said tunnel diode being connected to said collector;
• means for maintaining the voltage across said tunnel diode at either of two distinct values, corresponding to said two memory cell states;
• and,
• means for establishing an operating current in said tunnel diode and in said first bipolar transistor connected thereto, said operating current being larger than the tunnel diode valley current and smaller than the tunnel diode peak current;
• whereby the voltage across said tunnel diode is maintained at either of said two distinct values, corresponding to said two memory cell states, while said first bipolar transistor is maintained in its on condition by said operating current, regardless of the voltage across said tunnel diode.

A two state memory cell comprising:

• a first bipolar transistor having a base, an emitter and a collector;
• a tunnel diode shunted across the base-collector junction of said first bipolar transistor, the anode of said tunnel diode being connected to said base, and the cathode of said tunnel diode being connected to said collector;
• and,
• means for maintaining the voltage across said tunnel diode at either of two distinct values, corresponding to said two memory cell states;
• wherein said first bipolar transistor is an NPN transistor, wherein said tunnel diode comprises a heavily doped N.sup.++ layer on said collector, and a heavily doped P.sup.++ layer on said heavily doped N.sup.++ layer, and wherein said memory cell further includes a metallization layer for connecting said heavily doped P.sup.++ layer to said base.

A two state memory cell comprising:

• a first bipolar transistor having a base, an emitter and a collector;
• a tunnel diode shunted across the base-collector junction of said first bipolar transistor, the anode of said tunnel diode being connected to said base, and the cathode of said tunnel diode being connected to said collector;
• and,
• means for maintaining the voltage across said tunnel diode at either of two distinct values, corresponding to said two memory cell states;
• wherein said first bipolar transistor includes a second emitter, and wherein said memory cell further includes a Schottky diode, the cathode of which is connected to the cathode of said tunnel diode and the anode of which is connected to said second emitter, for switching said tunnel diode from the higher to the lower of said two distinct voltage values.

A two state memory cell comprising:

• a first bipolar transistor having a base, an emitter and a collector;
• a tunnel diode shunted across the base-collector junction of said first bipolar transistor, the anode of said tunnel diode being connected to said base, and the cathode of said tunnel diode being connected to said collector;
• means for maintaining the voltage across said tunnel diode at either of two distinct values, corresponding to said two memory cell states;
• and,
• a second bipolar transistor, the base of which is connected to the collector of said first bipolar transistor, the collector of which is connected to the base of said first bipolar transistor and the emitter of which is connected to a predetermined voltage source, for switching said tunnel diode from the lower to the higher of said two distinct voltage values.

A two state memory cell comprising:

• a first bipolar transistor having a base, an emitter and a collector;
• a tunnel diode shunted across the base-collector junction of said first bipolar transistor, the anode of said tunnel diode being connected to said base, and the cathode of said tunnel diode being connected to said collector;
• means for maintaining the voltage across said tunnel diode at either of two distinct values, corresponding to said two memory cell states;
• and,
• a second bipolar transistor, the collector of which is connected to the collector of said first bipolar transistor, the emitter of which is connected to the emitter of said first bipolar transistor and the base of which is connected to a predetermined voltage source, for switching said tunnel diode from the lower to the higher of said two distinct voltage values.