Monolithic static memory cell and method for its operation

A method for the operation of a monolithic static memory, comprising the steps of:

• providing two cross-coupled inverters each comprised of a series connection of a field effect switching transistor and a load element designed as a field effect transistor, the load element field effect transistors having differing channel resistances;
• selectively altering when operationally desired a charge state of a gate insulating layer of one of the load element field effect transistors such that a change in a threshold voltage of the one transistor results in a change of its channel resistance over the channel resistance of the other load element transistor if it was under before the selective altering or vice-versa;
• said selective altering including the steps of deflecting an electron beam of an electron beam writer such that it selectively scans the channel region of the field effect transistor, a current density, influence duration, and acceleration voltage of the electron beam being selected such that the beam generates in the gate insulating layer a positive charge which moves the value of the threshold voltage from a lower value existing without this charging to a higher value or vice-versa.