A data processing system in which execution of each macroinstruction is divided into a plurality of stages, comprising:
- a data storage;
- instruction means connected to said data storage for sequentially decoding each macroinstruction received from said data storage to control execution of those stages preceding the last stage thereof;
- control storage means connected to said instruction means for providing a microinstruction sequence in response to an operation code of the decoded macroinstruction received from said instruction means to control execution of the last stage thereof;
- first and second register means connected to said instruction means for storing a fetch front address and a length of data value to be fetched, respectively, for the decoded macroinstruction, said fetch front address and said length of data value initially being provided by said instruction means as a result of decoding of each macroinstruction, and means for renewing the fetch front address and length of data value after each read-out operation performed for the decoded macroinstruction, so that the renewed fetch front address and length of data value respectively manifest a fetch front address and a length of a remaining part of said data to be assessed;
- read out means connected to said data storage and said instruction means for reading out a data block of a predetermined length and located between two address boundaries in said data storage which includes said fetch front address in said first register means, means for controlling said read-out so that it is performed first during a predetermined stage preceding the last stage of execution of a macroinstruction in order to fetch a first data block corresponding to the fetch front address initially stored in the first register means, and thereafter during the last stage in order to fetch a second data block corresponding to the renewed fetch front address;
- first align control means connected to said instruction means for providing a first shift amount and a first mask position signal when said first data block is fetched from said data storage, including first means responsive to the operation code of the decoded macroinstruction and the initially provided fetch front address for providing said first shift amount and second means responsive to the initially provided data length, the initially provided fetch front address and the operation code for providing said first mask position signal;
- second align control means connected to said instruction means for providing a second shift amount and a second mask position signal when the second data block is fetched from said data store, including third means responsive to an align field provided in a microinstruction and the renewed fetch front address for providing said second shift amount, and fourth means responsive to the renewed data length, the renewed fetch front address and said align field for providing said second mask position signal;
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- data shifting means connected to said data storage and said first and second align control means for shifting the first and second data blocks read out of said data storage in accordance with said first and second shift amounts, respectively, and for masking the shifted first and second data blocks in accordance with said first and second mask position signals, respectively.