Double superheterodyne receiver

A double superheterodyne receiver having a front-end stage for receiving an RF signal, first local oscillator means for generating a first local oscillator signal, first mixer means for mixing the RF signal with the first local oscillator signal to produce a first IF signal, second local oscillator means for generating a second local oscillator signal, second mixer means for mixing the first IF signal with the second local oscillator signal to produce a second IF signal, detecting means for detecting information carried on the second IF signal, and control means for controlling the frequencies of the first and second local oscillator signals;

• wherein said first local oscillator means includes a first phase-locked loop circuit formed of means providing a first reference signal, a first voltage controlled oscillator providing said first local oscillator signal at a frequency that varies with a first error signal applied thereto, first phase comparator means providing said first error signal as a function of the relative phase of the first local oscillator signal and said first reference signal, and first programmable frequency divider means coupled to divide the frequency of said first local oscillator signal by a first integer N.sub.1 before application to said first phase comparator means;
• wherein said second local oscillator means includes a second phase-locked loop circuit formed of means providing a second reference signal, a second voltage controlled oscillator providing said second local oscillator signal at a frequency that varies with an error signal applied thereto, second phase comparator means providing said second error signal as a function of the relative phase of said second local oscillator signal and said second reference signal, and second programmable frequency divider means coupled to divide the frequency of said second local oscillator signal by a second integer N.sub.2, a frequency converter interposed between said second voltage controlled oscillator and said second programmable divider means, and a reference oscillator circuit providing a frequency converting signal to said frequency converter means to convert thereby the frequency of said second local oscillator signal;
• wherein said reference oscillator circuit includes means selectively switchable between a first mode in which said frequency converting signal is provided at a fixed preset frequency and a second mode in which said frequency converting signal is tunable over a range corresponding to a unit change in said second integer N.sub.2 ;
• and wherein said control means selects the first integer N.sub.1 and the second integer N.sub.2 so that the first and second local oscillator means are tuned to respective local oscillator frequencies together corresponding to the frequency of a desired RF signal.

A double superheterodyne receiver having a front-end stage for receiving an RF signal, first local oscillator means for generating a first local oscillator signal, first mixer means for mixing the RF signal with the first local oscillator signal to produce a first IF signal, second local oscillator means for generating a second local oscillator signal, second mixer means for mixing the first IF signal with the second local oscillator signal to produce a second IF signal, detecting means for detecting information carried on the second IF signal, and control means for controlling the frequencies of the first and second local oscillator signals;

• wherein said front-end stage includes a plurality of tuning coils, a tuning capacitor, and switching means for selectively coupling one of said tuning coils to said tuning capacitor in response to a selection of first and second tuning integers N.sub.1 and N.sub.2 ;
• wherein said first local oscillator means includes a first phase-locked loop circuit formed of means providing a first reference signal, a first voltage controlled oscillator providing said first local oscillator signal at a frequency that varies with a first error signal applied thereto, first phase comparator means providing said first error signal as a function of the relative phase of the first local oscillator signal and said first reference signal, and first programmable frequency divider means coupled to divide the frequency of said first local oscillator signal by said first integer N.sub.1 prior to application to said first phase comparator means;
• wherein said second local oscillator means includes a second phase-locked loop circuit formed of means providing a second reference signal, a second voltage controlled oscillator providing said second local oscillator signal at a frequency that varies with an error signal applied thereto, second phase comparator measn providing said second error signal as a function of the relative phase of said second local oscillator signal and said second reference signal, and second programmable frequency divider means coupled to divide the frequency of said second local oscillator signal by said second integer N.sub.2 prior to application to said second phase comparator means;
• and wherein said control means selects the first integer N.sub.1 and the second integer N.sub.2 so that the first and second local oscillator means are tuned to respective local oscillator frequencies together corresponding to the frequency of a desired RF signal.

In a double superheterodyne receiver of the type comprising means for receiving an incoming RF signal, first local oscillator means providing a first local oscillator signal at a first local oscillator frequency, first mixer means for mixing said incoming RF signal with said first local oscillator signal to obtain a first IF signal, second local oscillator means providing a second local oscillator signal at a second local oscillator frequency, second mixer means for mixing said first IF signal with said second local oscillator signal to obtain a second IF signal, detecting means for detecting information carried on said second IF signal, and control means for controlling the respective frequencies of said first and said second local oscillator signals;

• wherein said first and second local oscillator means each include digitally controlled frequency generator means for providing said first and second local oscillator signals at frequencies that are substantially linear functions of first and second digital values N.sub.1 and N.sub.2, respectively;
• and wherein said control means includes automatic logic circuitry for providing said digital values N.sub.1 and N.sub.2 to the respective digitally controlled frequency generators of said first and second local oscillator means as a function of selecting a desired frequency of said incoming signal, with the second digital value N.sub.2 being provided from a perdetermined range of integers so that the second local oscillator frequency remains in a corresponding range of frequencies, with a unit change in the first digital value N.sub.1 corresponding to a frequency change equal to said corresponding range of frequencies;
• the improvement wherein said control means includes frequency selection means interfaced with said logic circuitry for selecting said desired frequency, with said logic circuitry providing said second digital value N.sub.2 such that when the latter is at an end of its predetermined range, said logic circuitry carries out a successive RF frequency change by automatically circulating said second digital value N.sub.2 to the other end of its predetermined range and simultaneously changing said first digital value N.sub.1 by a unit increment.