High density integrated read-only memory
AssigneeInternational Business Machines Corporation
InventorsMichel J. Grandguillot, Pierre B. Mollier, Jean-Paul J. Nuez
Life of this patent
Estimating the term…
Loading patent…
AssigneeInternational Business Machines Corporation
InventorsMichel J. Grandguillot, Pierre B. Mollier, Jean-Paul J. Nuez
Estimating the term…
Integrated read-only memory including nxm memory cells located at the intersections of m bit lines and n word lines in which binary information of a first type is represented by the presence of a connection to a transistor in a cell, the base of said transistor being connected to a word line while its emitter is connected to a bit line, and in which binary information of a second type is represented by the absence of a connection to a transistor in a cell, said memory being of the type in which reading is ensured by means of m read transistors the emitters of which are connected to the bit lines while their bases are connected to a reference voltage supply, the improvement comprising read transistors arranged into k adjacent sets of m/k consecutive elements, k being an integer submultiple of m, the transistors of each set being provided in the same collector epitaxial bed in a semiconductor substrate with a collector contact common to all the transistors, the collector contact of each set being connected to a read circuit.
Integrated read-only memory including nxm memory cells located at the intersections of m bit lines and n word lines in which binary information of a first type is represented by the presence of a connection to a transistor in a cell, the base of said transistor being connected to a word line while its emitter is connected to a bit line, and in which binary information of a second type is represented by the absence of connection to a transistor in a cell, said memory being of the type in which reading is ensured by means of m read transistors the emitters of which are connected to the bit lines while their bases are connected to a reference voltage supply, the improvement comprising read transistors (TL) arranged into k adjacent sets of m/k consecutive elements, k being an integer submultiple of m, the transistors of each set being provided in the same collector epitaxial bed (51) in a semiconductor substrate with a collector contact (C1) common to all the transistors, the collector contact of each set being connected to a read circuit (CL).
Dependencies are inferred from the claim text.