Routine timer for computer systems

A method of processing timers of a main computer including a main memory monitoring a plurality of hardware devices operating simultaneously and controlling real-time tasks of said hardware devices according to a plurality of preprogrammed process routines stored in a main memory including a respective routine for each real-time task, comprising the steps of:

• identifying each of a plurality of process routines for servicing one of a plurality of real-time tasks, respectively, to be controlled by the main computer with a unique identifier which said main computer is programmed to recognize;
• supplying task data from said plurality of devices to be received by said main computer for use in a plurality of identified process routines;
• processing said process routines in said main computer in order of a predetermined priority stored in a table in the main memory until an event timer is initiated by accessing a predetermined memory addressed by the routine currently being processed;
• transferring processing of said timer to a routine timer located outside said main computer, said routine timer having a data analysis control means for processing said timer simultaneously with other active timers;
• and
• after said timer is terminated, setting a flag in said main computer.

A computer system for providing real-time servicing to a plurality of hardware devices comprising:

• a main computer forprocessing a plurality of preprogrammed routines for servicing respective ones of said hardware devices;
• a main memory coupled to said main computer to exchange data back and forth;
• a routine timer located outside said main computer for simultaneously processing event timers called for by said preprogrammed routines run in said main computer simultaneously, said routine timer comprising means for monitoring said main computer during processing of said plurality of routines to detect predetermined memory access associated with said routines being processed;
• input/output control means for sequencing the transfer of data containing the length of an event timer called for by a specific routine from said main memory to said input/output control means and for providing signals indicative of event timer termination of a specific event timer to said main memory;
• data analysis control means for processing information provided by said input/output control means by decrementing each event timer by a predetermined time segment and informing said input/output control when an event timer has terminated;
• and
• means to control transfer of information between said input/output control means and said data analysis control means.

A computer system for providing realtime servicing to a plurality of hardware devices comprising:

• a main computer for processing a plurality of preprogrammed routines for servicing respective ones of said hardware devices;
• a main memory coupled to said main computer to exchange data back and forth;
• a routine timer located outside said main computer for simultaneously processing delays called for by said preprogrammed routines run in said main computer, said routine timer comprising means for monitoring said main computer during processing of said plurality of routines to detect predetermined memory access associated with said routines being processed;
• input/output control means for sequencing the transfer of data containing length of a delay of a specific routine from said main memory to said input/output control means and for providing signals indicative of delay termination of a specific delay to said main memory;
• data analysis control means for processing information provided by said input/output control means by decrementing each delay by a predetermined time segment and informing said input/output control when a delay has terminated;
• and
• means to control transfer of information between said input/output control means and said data analysis control means.

A computer system for providing realtime servicing to a plurality of hardware devices comprising:

• a main computer for processing a plurality of preprogrammed routines for servicing respective ones of said hardware devices;
• a main memory coupled to said main computer to exchange data back and forth;
• a routine timer located outside said main computer for simultaneously processing delays and event timers called for by said preprogrammed routines run in said main computer, said routine timer comprising means for monitoring said main computer during processing of said plurality of routines to detect predetermined memory access associated with said routines being processed;
• input/output control means for sequencing the transfer of data containing the length of a delay and length of an event timer of a specific routine from said main memory to said input/output control means and for providing signals indicative of delay and event timer termination to said main memory;
• data analysis control means for processing information provided by said input/output control means by decrementing each delay and each event timer by a predetermined time segment and informing said input/output control when a delay has terminated and when an event timer has terminated;
• and
• means to control transfer of information between said input/output control means and said data analysis control means.