Method and apparatus for decoding cyclic codes via syndrome chains
AssigneeBell Telephone Laboratories, Incorporated
InventorDev V. Gupta
Life of this patent
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AssigneeBell Telephone Laboratories, Incorporated
InventorDev V. Gupta
Estimating the term…
A received cyclic code word is clocked into a first register (11). As soon as the whole received word has been read in, it is parallel-loaded into a storage register (12). The syndrome is then formed (13) of the stored code word. This syndrome is coupled to a logic circuit (14) which determines whether the last stored bit is in error. This decision is modulo-2 added (15) with the last bit, the output being the correct version of the last bit which is then clocked into the input of the storage register. The operation is repeated a given number of times (nt*) at the end of which the maximum likelihood decision on r(x)--the cyclic code word--is present in the storage register (12), ready to be read out.
Apparatus for decoding cyclic codes that may incorporate one or more errors comprising first register means for receiving a cyclic code word, second register means for storing the code word received by the first register means, means for forming the syndrome of the code word stored in the second register means, means responsive to said syndrome for determining whether the last bit of the stored code word is in error, means for modulo-2 adding the output of the determining means with said last bit to provide a correct version of the last bit, means for shifting the output of the modulo-2 means into the input of the second register means, and means for repeating the correction operation a predetermined number of times at the end of which the maximum likely code word is present in the second register means, said forming means comprising means for forming successive syndrome chains of multiple syndromes each to correct errors in a received cyclic code word.
A method for decoding cyclic codes comprising the steps of receiving an (n,k) cyclic code word, storing the received code word in a register, forming the syndrome of the stored code word, determining from the syndrome whether the last bit of the stored code word is in error, binarily adding the result of the determination with said last bit to provide a correct version of the last bit, shifting said correct version into the input of said register, and repeating the forming, determining, adding and shifting steps a predetermined number of times at the end of which the maximum likely code word will be present in the register, said forming step comprising forming successive syndrome chains of multiple syndromes each to correct errors in a received cyclic code word.
A method for decoding cyclic codes comprising the steps of
Dependencies are inferred from the claim text.