I.sup.2 L With polysilicon diodes and interconnects

An integrated circuit having a plurality of gate circuits, which comprises:

• a semiconductor body having a major surface;
• at least first, second and third bipolar transistors, each having an emitter zone, a base zone forming a signal input and a collector zone located successively in a direction transverse to said major surface, at least the base and collector zones of said transistors adjoining said major surface;
• means for supplying surrent connected to each signal input;
• a plurality of diodes connected to each collector zone to form a plurality of signal outputs from each transistor;
• an insulating layer on at least a portion of said major surface;
• a system of signal connections for connecting at least the collector zone of said first transistor to the base zones of said second and third transistors, said system of signal connections comprising a plurality of paths of conductive material on said insulating layer and locally extending down to said major surface through apertures in said insulating layer to contact at least the collector zone of said first transistor and the base zones of said second and third transistors, said paths of conductive material comprising a polycrystalline semiconductor track and at least first and second diode junctions for coupling the collector zone of said first transistor respectively to the base zones of said second and third transistors, said first and second diode junctions comprising p-n junctions each adjoining and formed from said polycrystalline semiconductor track on at least one side of each junction, each junction being spaced apart from the collector zone of said first transistor and the base zones of said second and third transistors, the distance between the collector zone of the first transistor and the first diode junction measured along the signal connection being larger than the distance between the first diode junction and the base zone of the second transistor measured along the signal connection, and the first and second diode junctions being situated closer to the second and third transistors, respectively, than to the first transistor;
• and
• fourth, fifth and sixth bipolar transistors and third and fourth p-n junctions, the collector zones of said fourth and fifth transistor being connected to the base of said sixth transistor by, respectively, said third and fourth p-n junctions, said third p-n junction being closer to said fourth transistor than said sixth, and said fourth p-n junction being closer to said fifth transistor than said sixth.