Non-coplanar barrier-type charge coupled device with enhanced storage capacity and reduced leakage current

A charge coupled device comprising:

• a substrate of semiconductor material having a dopant impurity of P-type conductivity, said substrate having a first surface;
• a body of insulating material disposed on said first surface of said substrate;
• means defining a surface charge transfer channel in said substrate lying along said first surface of said substrate;
• first and second spaced apart phase electrodes overlying said surface channel in transverse relation thereto, each of said first and second phase electrodes including a first electrode portion and an integral second electrode portion offset with respect to the first electrode portion and arranged with respect to said body of insulating material so as to provide a layer of insulating material of non-uniform thickness between each of said phase electrodes and said first surface of said substrate including a relatively thin insulation portion between the first electrode portion of each electrode and said first surface and a relatively thick insulation portion between the offset second electrode portion of each electrode and said first surface;
• a dopant layer having a dopant impurity of N-type conductivity in said surface charge transfer channel lying relatively near to said first surface of said substrate;
• said substrate under each of said first and second phase electrodes being divided into a barrier region and an adjacent well region respectively defined under one and the other of said first electrode portion and said offset second electrode portion of each electrode, said dopant layer of said N-type conductivity extending through said barrier regions and said well regions;
• an enhanced relatively deep layer having a dopant impurity of P-type conductivity and of greater concentration than the P-type conductivity dopant impurity in the semiconductor material of said substrate disposed within said substrate at a depth spaced from said first surface and extending through said barrier regions and said well regions beneath said first and second phase electrodes;
• and
• the P-type conductivity dopant impurity of said enhanced relatively deep P-type conductivity layer having a relatively uniform distribution extending from said first surface of said substrate to approximately 5000 A-15,000 A below said first surface.

A charge coupled device comprising:

• a substrate of semiconductor material having a dopant impurity of P-type conductivity, said substrate having a first surface;
• a body of insulating material disposed on said first surface of said substrate;
• means defining a charge transfer buried channel layer having a dopant impurity of N-type conductivity in said substrate lying adjacent to said first surface of said substrate;
• first and second spaced apart phase electrodes overlying said buried channel layer in transverse relation thereto, each of said first and second phase electrodes including a first electrode portion and an integral second electrode portion offset with respect to the first electrode portion and arranged with respect to said body of insulating material so as to provide a layer of insulating material of non-uniform thickness between each of said phase electrodes and said first surface of said substrate including a relatively thin insulation portion between the first electrode portion of each electrode and said first surface and a relatively thick insulation portion between the offset second electrode portion of each electrode and said first surface;
• said substrate under each of said first and second phase electrodes being divided into a barrier region and an adjacent well region respectively defined under one and the other of said first electrode portion and said offset second electrode portion of each electrode, said buried channel layer of N-type conductivity extending through said barrier regions and said well regions;
• an enhanced relatively deep layer having a dopant impurity of P-type conductivity and of greater concentration than the P-type conductivity dopant impurity in the semiconductor material of said substrate disposed within said substrate at a depth spaced from said first surface and extending through said barrier regions and said well regions beneath said first and second phase electrodes;
• and
• the N-type conductivity dopant impurity of said N-type conductivity buried channel layer having a Gaussian distribution with a peak lying within 3000 A-10,000 A from said first surface of said substrate, and the P-type conductivity dopant impurity of said enhanced relatively deep P-type conductivity layer having a Gaussian distribution with a peak lying within 5000 A-15,000 A from said first surface.

A charge coupled device comprising:

• a substrate of semiconductor material having a dopant impurity of P-type conductivity, said substrate having a first surface;
• a body of insulating material disposed on said first surface of said substrate;
• means defining a charge transfer buried channel layer having a dopant impurity of N-type conductivity in said substrate lying adjacent to said first surface of said substrate;
• first and second spaced apart phase electrodes overlying said buried channel layer in transverse relation thereto, each of said first and second phase electrodes including a first electrode portion and an integral second electrode portion offset with respect to the first electrode portion and arranged with respect to said body of insulating material so as to provide a layer of insulating material of non-uniform thickness between each of said phase electrodes and said first surface of said substrate including a relatively thin insulation portion between the first electrode portion of each electrode and said first surface and a relatively thick insulation portion between the offset second electrode portion of each electrode and said first surface;
• said substrate under each of said first and second phase electrodes being divided into a barrier region and an adjacent well region respectively defined under one and the other of said first electrode portion and said offset second electrode portion of each electrode, said buried channel layer of N-type conductivity extending through said barrier regions and said well regions;
• an enhanced relatively deep layer having a dopant impurity of P-type conductivity and of greater concentration than the P-type conductivity dopant impurity in the semiconductor material of said substrate disposed within said substrate at a depth spaced from said first surface and extending through said barrier regions and said well regions beneath said first and second phase electrodes;
• and
• the N-type conductivity dopant impurity of said N-type conductivity buried channel layer having a relatively uniform distribution extending from said first surface of said substrate to approximately 3000 A-10,000 A below said first surface, and the P-type conductivity dopant impurity of said enhanced relatively deep P-type conductivity layer having a relatively uniform distribution extending from said N-type conductivity buried channel layer to approximately 5000 A-15,000 A below said first surface.