MIS Device including a substrate bias generating circuit

A MIS device including a substrate bias generating circuit for absorbing charges in a semiconductor substrate thereof, comprising:

• first and second power supply lines;
• an oscillating circuit for generating clock signals;
• a charging and discharging circuit, connected to said first and second power supply lines and to said oscillating circuit, for generating an output signal which has a potential equal to the potential of said first or second power supply lines in response to said clock signals;
• a bias circuit, connected to said charging and discharging circuit, to said semiconductor substrate and to said second power supply line, for absorbing said charges in said semiconductor substrate in response to the output signal of said charging and discharging circuit;
• a clamp circuit, connected to said semiconductor substrate and said second power supply line, for clamping the potential of said semiconductor substrate, and;
• said clamp circuit including at least one diode-connected transistor arranged between the connection point connecting the output of said bias circuit to said substrate and said second power supply line.