Diffused resistor
AssigneeFujitsu Limited
InventorOsamu Kudo
Life of this patent
Estimating the term…
Abstract
A diffused resistor for an integrated circuit comprising two resistor portions. Each of the resistor portions comprises a semiconductor substrate of a first conductivity type, an isolated epitaxial region of a second conductivity type, a diffused region (i.e. a resistance layer) of the first conductivity type, a contacting region of the second conductivity type and terminals. An end portion of the resistance layer in one of the resistor portions is connected to one of the ends of the resistance layer in the other resistor portion so that these resistance layers combine to form a resistor. In the other resistor portion the other end portion of the resistance layer is connected to the contacting region. Depletion layers generated in the resistor portions vary so as to maintain the resistance of the diffused resistor constant.
Claims16
A resistor, for a semiconductor device, comprising:
- a semiconductor substrate of a first conductivity type;
- first and second isolated regions of a second conductivity type, opposite to said first conductivity type, formed on said semiconductor substrate;
- a first impurity region of the first conductivity type formed in said first isolated region, said first impurity region having first and second end portions and having first and second terminals formed on said first and second end portions, respectively;
- a second impurity region of the first conductivity type formed in said second isolated region, said second impurity region having third and fourth end portions and having third and fourth terminals formed on said third and fourth end portions, respectively, said third terminal electrically connected only to said second terminal;
- a fifth terminal formed on said first isolated region;
- a sixth terminal formed on said second isolated region and electrically connected to said fourth terminal;
- and
- means for supplying potentials to said first, fourth and fifth terminals so that depletion layers are generated in said first and second isolated regions, said means for supplying potentials including means for maintaining a substantially constant potential across said first and fifth terminals, said substantially constant potential of a polarity to reverse bias the pn junction.
A resistor, for a semiconductor device, comprising:
- a semiconductor substrate of a first conductivity type;
- first and second buried layers of a second conductivity type, opposite to said first conductivity type, formed on said semiconductor substrate;
- first and second isolated regions of the second conductivity type formed on said semiconductor substrate and on said first and second buried layers, respectively;
- a first impurity region of the first conductivity type formed in said first isolated region, said first impurity region having first and second end portions and having first and second terminals formed on said first and second end portions, respectively;
- a second impurity region of the first conductivity type formed in said second isolated region, said second diffused region having third and fourth end portions and having third and fourth terminals formed on said third and fourth end portions, respectively, said third terminal electrically connected only to said second terminal;
- a fifth terminal formed on said first isolated region;
- a sixth terminal formed on said second isolated region and electrically connected to said fourth terminal;
- and
- means for supplying potentials to said first, fourth and fifth terminals so that depletion layers are generated in said first and second isolated regions, said means for supplying potentials including means for maintaining a substantially constant potential across said first and fifth terminals, said substantially constant potential of a polarity to reverse bias the pn junction.
Dependencies are inferred from the claim text.