Charge coupled device staircase electrode multiplexer

A charge coupled device for multiplexed serial-to-parallel storage formed on a semiconductive substrate comprising:

• a plurality of parallel elongate channel stops formed in said substrate defining N parallel channels, said N channel stops extending in a first direction to their N terminations, the terminations of adjacent ones of said channel stops being progressively offset in said first direction from one another to define a corresponding plurality of N charge flow entrances progressively offset from one another in said first direction adjacent said progressively offset N channel stop terminations;
• a plurality of N parallel elongate insulated electrodes terminated in N terminations and overlying said substrate extending in a second direction transverse to said first direction to their N terminations, terminations of adjacent ones of said electrodes being progressively offset in said second direction from one another in cooperation with said N terminations of said N channel stops so that said N electrode terminations are each adjacent a corresponding one of said N channel stop terminations and so that a progressively different one of said N electrode terminations is adjacent a progressively different one of said N channel stop terminations, the first electrode termination being adjacent the first one of said N entrances and the first of said N channel stop terminations, and the Nth electrode termination being adjacent the Nth one of said N entrances and the Nth one of said N channel stop terminations:
• a multiplexing electrode overlapping said N channel stop terminations and said N electrode terminations and surrounded by a continuous outside edge, said outside edge comprising a plurality of 2N continous outside edge portions, alternate ones of said 2N outside edge portions extending in said second direction and offset progressively in said first direction from one another cooperatively with said progressively offset N channel stop terminations so as to be adjacent corresponding ones of said N channel stop terminations and corresponding ones of said N electrode terminations, the first of said alternate ones of said outside edge portions being adjacent the first of said N electrode terminations and the first of said N channel stop terminations and the Nth one of said alternate ones of said 2N outside edge portions being adjacent the Nth one of said electrode terminations and the Nth one of said channel stop terminations, the remaining ones of said 2N outside edge portions extending in said first direction so as to connect between adjacent ones of said alternate edge portions, and being parallel to and adjacent corresponding ones of said N channel stops, the first one of said remaining ones of said edge portions being adjacent the first channel stop and the Nth one of said remaining edge portions being adjacent said Nth channel stop;
• serial input means for transferring charge having a charge flow channel in said substrate including means for forming a charge storage potential well in said substrate into which a charge packet may be serially transferred through said register, said multiplexing electrode at least partially overlying said charge storage potential well;
• and
• means for applying N phase clock signals to said N parallel electrodes and for applying a clock signal to said multiplexing electrode in synchronism with said N phase clock signals, the first of said N phase clock signals being applied to the first one of said N parallel electrodes and the Nth one of said N phase clock signals being applied to the Nth one of said N parallel electrodes.