Lateral transistor free of parisitics
AssigneeSiemens Aktiengesellschaft
InventorRolf Johannsen
Life of this patent
Estimating the term…
Abstract
For the sake of an increased operational security and a reduction of substrate currents of an intergrated semiconductor circuit with a lateral transistor and a pn insulation, a protective zone exhibiting the opposite conductivity type and contacted barrier-free together with the collector of the collector electrode is inventively provided in the collector of the lateral transistor.
Claims12
In a monolithic integrated circuit, the combination comprising a substrate of semiconductor material, an epitaxial layer of one conductivity type on one major surface of said substrate, said substrate being of a second conductivity type, a buried layer of said one conductivity type formed partially in said epitaxial layer and partially in said substrate, a lateral transistor in said epitaxial layer which includes an emitter zone of said second conductivity type above said buried layer, a base zone of said first conductivity type abutting said emitter zone, said base zone also located above said buried emitter zone, and a collector zone abutting said base zone, said emitter, base and collector zones forming said lateral transistor, a protective zone of said first conductivity type formed in said collector zone of said lateral transistor and displaced from the center of said collector zone in the direction toward said emitter zone and which protective zone serves as the collector of an inverse vertical transistor whose emitter is provided by said buried layer, base, emitter and collector electrodes with said collector electrode making electrical contact with said collector zone and said protective zone.
A monolithically integrated semiconductor circuit device having at least one lateral transistor formed in a semiconductor crystal, said transistor having a base zone of one conductivity type and an emitter and a collector zone of a second conductivity type, said base zone being delimited from its environment in said crystal by means of a pn junction reverse biased via a d.c. voltage, an additional zone in said crystal of the same conductivity type as said base zone formed in part of said collector zone adjacent the surface of said crystal and displaced from the center of said collector zone in the direction toward said emitter zone and electrodes making ohmic contacts for said emitter, base and collector zones, said additional zone being contacted barrier-free by the same electrode as the one which contacts said collector zone.
An integrated semiconductor circuit arrangement comprising monocrystalline semiconductor slice of p-type conductivity, a lateral transistor formed in a surface of said slice which is rotational-symmetrical, said lateral transistor having a base zone of said one conductivity type, and having emitter and collector zones of the opposite conductivity type providing an emitter zone, said emitter zone being equidistantly surrounded at a small interval annularly by said collector zone, an annular highly doped additional zone of said one conductivity type in said collector zone and displaced from the center of said collector zone in the direction toward said emitter zone and emitter, collector and base electrodes on said surface contacting said emitter, collector and base respectively, said collector electrode also contacting said additional zone.
A monolithically integrated semiconductor circuit comprising a semiconductor layer of one conductivity type, at least one lateral transistor in said layer being delimited from its environment in said crystal by means of a pn junction reverse biased by a d.c. voltage, said crystal having an additional zone of the same conductivity type as said base zone formed within said collector zone of said lateral transistor and displaced from the center of said collector zone in the direction toward said emitter zone and an electrode contacting said collector zone of said lateral transistor and said additional zone in a barrier-free manner.
A monolithically integrated semiconductor circuit device having at least one lateral transistor formed in a semiconductor crystal, said transistor having a base zone of one conductivity type and an emitter and a collector zone of a second conductivity type, said base zone being delimited from its environment in said crystal by means of a pn junction reverse biased via a d.c. voltage, an additional zone in the crystal of the same conductivity type as said base zone formed in part of said collector zone adjacent the surface of said crystal, electrodes making ohmic contacts for said emitter, base and collector zones, said additional zone being contacted barrier-free by the same electrode as the one which contacts said collector zone, the specific conductivity of said additional zone being higher than that of said base zone in the area between said emitter and said collector of said lateral transistor, the distance between said additional zone introduced into said collector zone of said lateral transistor being smaller at the side lying opposite said emitter than at the side lying opposite said pn junction limiting said base zone of said lateral transistor toward the outside.
Dependencies are inferred from the claim text.