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US 4,288,864 AGranted
Serial-parallel-serial CCD memory system with fan out and fan in circuits
AssigneeInternational Business Machines Corporation
InventorsThomas V. Harroun, Lawrence G. Heller, Norbert G. Vogl, Jr.
Life of this patent
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Abstract
An SPS CCD memory system is provided wherein a single tap, preferably a storage node, on an input serial or shift register is connected to the input of a plurality of parallel shift registers through a fan out circuit and the output of the plurality of parallel shift registers is connected to a single tap, preferably a storage node, on an output serial or shift register through a fan in circuit.
Claims9
A serial-parallel-serial charge coupled device memory system comprising
- serial input and output sections each having a charge-carrying channel,
- first and second common charge-carrying channels, and
- first and second adjacent subsets of a main storage section, each of said subsets including a plurality of series registers having charge-carrying channels arranged parallel to each other, each register of said plurality of series registers having an input and an output, a fan out circuit having charge-carrying channels and a common input connected to said serial input section through said first common charge-carrying channel and a plurality of outputs connected to each input of said plurality of series registers and a fan in circuit having charge-carrying channels and a common output connected to said serial output section through said second common charge-carrying channel and a plurality of inputs connected to each output of said plurality of series registers,
- said serial input and output sections each including storage nodes with a transfer gate interposed between adjacent storage nodes, the common input of said fan out circuit of said first subset being coupled to a first storage node of said serial input section and the common input of said fan out circuit of said second subset being coupled to a second storage node of said serial input section, the common output of said fan in circuit of said first subset being coupled to a first storage node of said serial output section and the common output of said fan in circuit being coupled to a second storage node of said serial output section, said first storage nodes of said serial input and output sections being interconnected by said first subset and said second storage nodes of said serial input and output sections being interconnected by said second subset and a third storage node interposed between said first and second storage nodes in each of said serial input and output sections.
1 more element
Dependencies are inferred from the claim text.