MOS Semiconductor device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsNorihiko Kotani, Satoru Kawazu
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Abstract
The disclosed MOS transistor includes a channel region formed of a lightly doped semiconductor layer disposed in a surface portion of a heavily doped semiconductor layer subsequently disposed on a lightly doped semiconductor substrate. The channel region may be of the identical or opposite conductivity type to the heavily doped semiconductor layer that has the same type conductivity as the substrate. Also the channel region may be of an intrinsic semiconductive material. A source and a drain region may be disposed in the lightly or highly doped layer. Alternatively the source and drain regions may reach the substrate.
Claims9
An MOS semiconductor device comprising a semiconductor substrate of a first type conductivity having a low impurity concentration and including a main face, a first semiconductor layer of the first type conductivity disposed on said main face of said semiconductor substrate and having a high impurity concentration, a second semiconductor layer of a predetermined type conductivity disposed on the surface of said first semiconductor layer, the material of said second semiconductor layer being a material from the group consisting of a lightly doped semiconductive material and an intrinsic semiconductive material, at least a portion of said second semiconductor layer constituting a channel region of said semiconductor device, a pair of source and drain regions disposed on opposite lateral sides of said channel region and sandwiching said channel region therebetween, each of said source and drain regions having a second type conductivity and a high impurity concentration, an oxide film on said channel region, and a gate electrode disposed on said oxide film, whereby even where the channel region is thin and the distance between the source and drain regions is short, punch-through can be prevented.
Dependencies are inferred from the claim text.