Tunnel diode load for ultra-fast low power switching circuits

A direct coupled inverter circuit comprising an enhancement mode field effect transistor, means to apply at least two different input signals to the gate of said transistor, whereby the source-to-drain resistance of said transistor is lower for a first of said input signals, and is higher for a second of said input signals, the drain of said transistor in series with a load having a negative resistance over a limited voltage range, said load in series with said transistor connected to a power source, the output terminal of said inverter circuit being the node between said transistor and said load whereby at least one of said input signals is generated by a light beam.

An integrated gallium arsenide structure comprising a semi insulating gallium arsenide substrate, an enhancement mode n-channel field effect transistor at one surface of said substrate, portions of the n-drain region of said transistor representing the n-region of a tunnel diode, said tunnel diode comprising a p-region contiguous with said n-region, a first second, third and fourth contact to the source, gate and drain regions of said transistor, and to the p-region of said tunnel diode, respectively, means to apply a positive power supply voltage between said fourth and first contacts, means to apply a first and a second potential between said second and said first contacts, said first potential being more positive than said second potential, the steady state transistor current when said first potential is applied being only slightly larger than the valley current of said tunnel diode and substantially less than the peak current of said tunnel diode, the voltage across said tunnel diode when said first potential is applied being only slightly larger than the voltage across said tunnel diode at its valley current, and the steady state transistor current when said second potential is applied being less than the valley current of said tunnel diode.

An integrated structure comprising an enhancement mode field effect transistor means to charge the gate of said field effect transistor to a potential, a tunnel diode connected between said gate and the source of said field effect transistor whereby said gate discharges rapidly through said tunnel diode when said means to charge said gate is removed.

A forward biased tunnel diode in series connection with a network containing at least one field effect transistor, said tunnel diode and network connected to a power supply, the voltage of said power supply being only moderately larger than the voltage across said tunnel diode pertaining to the valley current of said tunnel diode, means for changing the gate voltage of said field effect transistor, thereby changing the current through said network and tunnel diode, said current including a first current value and a second current value, the steady state voltage across said tunnel diode at said first current value being less than the voltage across said tunnel diode pertaining to the peak current of said tunnel diode, the steady state voltage across said tunnel diode at said second current value being only moderately larger than the voltage pertaining to said valley current, and said second current value therefore being only moderately larger than said valley current and substantially lower than said peak current.