Transversal filter having parallel inputs
AssigneeSiemens Aktiengesellschaft
InventorsKarl Knauer, Hans-Joerg Pfleiderer
Life of this patent
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AssigneeSiemens Aktiengesellschaft
InventorsKarl Knauer, Hans-Joerg Pfleiderer
Estimating the term…
A transversal filter is disclosed in which the stages of an analog charge transfer device shift register, integrated on a doped semiconductor substrate, are provided with parallel inputs and evaluation circuits preconnected to the parallel inputs. The evaluation circuits respectively exhibit an area doped opposite to the substrate, a first input gate and a second input gate and a transfer gate, whereby the transfer gate is arranged immediately next to the transfer channel of the charge transfer device shift register. The one input gate is connected to an input signal, the other input gate is connected to a constant direct voltage, the oppositely doped area is connected to a first clock pulse voltage and the transfer gate is connected with a second clock pulse voltage. The output signal can be tapped at an output of the charge transfer device shift register. Comparators are provided having first inputs connected with a counter which is loaded with clock pulses and second inputs connected with digital memories. The outputs of the comparators are connected to the gate circuits which block the evaluation circuits to one of the supply clock pulse voltages as a function of the respective comparison results between the counter signal, on the one hand, and the digital signals input into the memories, on the other hand.
In a transversal filter of the type in which an analog charge transfer device shift register is integrated on a doped semiconductor substrate and includes a plurality of stages which have parallel inputs for receiving an input signal and a plurality of evaulation circuits connected thereto, each evaluation circuit including an area doped opposite to the substrate, first and second input gates and a transfer gate immediately adjacent the transfer channel of the charge transfer device shift register, one of the input gates connected to an input signal, the other input gate connected to a constant voltage and the oppositely doped area and the transfer gate respectively connected to receive first and second clock pulses from a clock, and in which the charge transfer device shift register includes an output, in combination therewith, the improvement comprising:
Dependencies are inferred from the claim text.