Amplifier circuit for obtaining true and complementary output signals from an input signal
AssigneeNippon Electric Co., Ltd.
InventorAkira Nagami
Life of this patent
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Abstract
An amplifier circuit for amplifying an input signal and obtaining true and complementary output signals includes cross-coupled transistors connected to first and second nodes. The first and second nodes are made to be an equal potential by precharging. Then, the potential of the first node is either maintained or changed to a lower (in absolute value) level in response to and dependently on a control input signal, while the potential of the second node is slightly lowered (in absolute value) by dividing the precharged change of the second node with a capacitor. Thus, the first node is controlled by the input signal, while the second node is given a reference potential determined by a capacitance division ratio.
Claims12
A transistor circuit comprising first and second nodes, a pair of cross-coupled transistors connected to said first and second nodes, means for operatively charging said first and second nodes with a first level, input means, including an input terminal, for determining the potential of said first node in accordance with an input signal applied to said input terminal, capacitance means, and switching means, arranged between said capacitance means and said second node for partially transferring electric charge stored in said second node at said first level into said capacitance means to change the potential of said second node to a second level lower than said first level in absolute value.
An amplifier circuit comprising first and second nodes, a pair of insulated-gate type field-effect transistors cross-coupled with each other and connected to said first and second nodes, first means coupled with said first and second nodes for adjusting potentials of said first and second nodes to a first level in a first time period, a capacitor, second means for coupling said second node to said capacitor to change, in a second time period the potential of said second node from said first level to a second level lower than said first level in absolute value, third means, coupled with said first node, and responsive to an input signal, for determing the potential of said first node to be either said first level or a third level which is lower than said second level in absolute value, and output means coupled with said first and second nodes for deriving a first output signal and a second output signal, said second output signal being complementary in logic level to said first output signal.
A semi-conductor circuit using insulated-gate type field-effect transistors comprising:
- a pair of insulated-gate type transistors whose sources are commonly connected and whose drains and gates are cross-connected;
- first switch means for connecting a common junction of said sources to a reference potential;
- first and second capacitors connected to respective drains of said pair of transistors;
- means for precharging said first and second capacitors to an equal potential;
- second switch means for discharging the precharged charges in said first capacitor dependent on and in response to a control input signal a third capacitor;
- and third switch means for dividing and allotting the pre-charged charges in said second capacitor to said third capacitor.
Dependencies are inferred from the claim text.