US 4,118,792 A · Malfunction detection system for a microprocessor based programmable controller

Abstract

Fault detection hardware is employed at the I/O interface racks of a programmable controller to detect fault conditions which may occur there. An I/O fault line is connected in daisy chain fashion between the I/O interface racks and the controller processor, and when a fault is indicated at any of the I/O interface racks, it is communicated to the controller processor through this line. The indicated I/O fault freezes, or holds, a microprocessor in the controller processor, and if the I/O fault persists for a preselected time interval, all operating devices connected to the programmable controller interface racks are decontrolled. A watchdog timer is also provided in the controller processor for detecting malfunction conditions which may occur at the processor. When such a condition is detected, the operating devices connected to the programmable controller interface racks are decontrolled.

Claims8

Dependent claims

In a programmable controller having a controller processor which connects to a plurality of separate I/O interface racks through an I/O address bus and an I/O data bus, the improvement therein comprising:

means at each of said I/O interface racks for detecting a malfunction condition thereat and generating a fault indicating logic signal when such a malfunction condition is detected;
a logic gate at each of said I/O interface racks having one input connected to receive said fault indicating logic signal, a second input and an output;
an I/O fault line which connects in daisy chain fashion between said I/O interface racks and to said controller processor, said I/O fault line connecting the output of the logic gate in each of said I/O interface racks with the second input of the logic gate in the next I/O interface rack in the daisy chain and connecting the output of the logic gate in the last I/O interface rack in the daisy chain to the controller processor;
and
means at said controller processor for receiving said fault indicating logic signal on said I/O fault line and indicating the presence of a malfunction.

2 more elements

A programmable controller comprising:

a memory which stores instructions;
a microprocessor connected to said memory, said microprocessor being operable to read instructions out of said memory and execute them;
a Boolean processor coupled to said memory and said microprocessor, said Boolean processor being operable in response to control signals from said microprocessor to perform logical operations on data stored within said memory;
malfunction indicating means which includes a watchdog timer coupled to said microprocessor to detect the occurrence of a preselected periodic event, said malfunction indicating means being operable to indicate a malfunction when said preselected periodic event does not occur within a preselected time period as determined by the timing out of said watchdog timer;
and
wherein the instructions stored in said memory include a set of instructions which are periodically executed by said microprocessor while said programmable controller is on line to test the operation of said Boolean processor, said set of instructions including:
a first subset of instructions which direct the Boolean processor to execute a prescribed sequence of operations;
a second subset of instructions which compare the actual state of said Boolean processor with a predetermined state after the execution of said first subset;
and
a third subset of instructions which enable said indicating means when the actual state of said Boolean processor is not the same as said predetermined state by inhibiting the occurrence of said preselected periodic event.

7 more elements

Dependencies are inferred from the claim text.

Malfunction detection system for a microprocessor based programmable controller

Life of this patent

Malfunction detection system for a microprocessor based programmable controller

Life of this patent

Abstract

Claims8