Timing signal generator circuit
AssigneeNippon Electric Co., Ltd.
InventorAkira Nagami
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Abstract
A timing signal generator includes a field-effect transistor having a drain supplied with a command signal and a source connected to an output node. The gate of the transistor is connected to a circuit node which is precharged to a voltage to render the transistor conductive prior to the activation of the command signal. A delay circuit having a predetermined delay time has an input connected to the output node and an output connected to a circuit for discharging the output node and the circuit node in response to the output of the delay circuit.
Claims10
A timing signal generator circuit comprising a field-effect transistor having a gate, a source and a drain, said drain being supplied with a first signal of predetermined pulse width, said source being connected to a capacitive output node, and said gate being connected to a capacitive circuit node;
- means for precharging said circuit node to a voltage sufficient to cause said transistor to be in a conductive state before said first signal is applied to said drain of said transistor;
- a delay circuit having a predetermined delay time and having an input connected to said output node;
- and means connected to the output of said delay circuit for discharging said output node and said circuit node following the charging of said capacitive output node to a level indicative of said first signal, when applied in response to the output of said delay circuit.
Dependencies are inferred from the claim text.