US 4,063,270 AGranted

Semiconductor controlled rectifier device having amplifying gate structure

AssigneeHitachi, Ltd.

InventorsShin Kimura, Yoshio Terasawa

Life of this patent

Estimating the term…

Loading patent…

Abstract

A semiconductor controlled rectifier device comprises a semiconductor substrate consisting of a plurality of layers of alternately different conductivity types, in which the outermost layer exposed at one of the principal surfaces is divided into a first portion providing a main thyristor, and a second portion having an area smaller than that of the first portion and providing an auxiliary thyristor. In the device, the second portion of the outermost layer of the substrate comprises a first region participating in the turn-on of the device, and a second region acting to increase the minimum gate current necessary to turn on the device, thereby increasing the minimum gate current necessary to turn on the auxiliary thyristor without appreciably increasing the gate current required for turning on the auxiliary thyristor and without reducing the switching power capability of the device, so that mal-firing due to noise current induced between the gate and the cathode can be prevented.

Claims11

Dependent claims

A semiconductor controlled rectifier device comprising a semiconductor substrate consisting of a plurality of layers of alternately different conductivity types and having a first and a second principle surface opposite to each other, the first layer exposed at said first principal surface of said semiconductor substrate being divided into a first portion and a second portion having an area smaller than that of said first portion, and the second layer continuous to the first layer having a portion thereof exposed at said first principal surface, a first main electrode disposed on said first principal surface and making ohmic contact with said first portion of said first layer, a gate electrode disposed on said first principal surface adjacent to said second portion of said first layer and making ohmic contact with the second layer, said gate electrode having a contact area with the second layer with an edge of substantial length, an auxiliary gate electrode disposed on said first principal surface adjacent to at least a part of said first portion and making ohmic contact with said second layer and at least a part of said second portion of said first layer, and a second main electrode disposed at a predetermined position on a selected one of said first and second principal surfaces, said second portion of said first layer defining between it and said second layer a junction adjacent to said gate electrode with an end exposed at said first principal surface, said exposed end extending substantially in parallel with said edge of the contact area, wherein said second portion of said first layer comprises a first region extending away from said gate electrode to have a predetermined effective width measured from said junction, and a second region extending away from said gate electrode contiguous to said first region to have an effective width smaller than said predetermined effective width measured from said junction.

A semiconductor controlled rectifier device comprising a semiconductor substrate consisting of a plurality of layers of alternately different conductivity types and having a first and a second principal surface opposite to each other, the first layer exposed at said first principal surface of said semiconductor substrate being divided into a first portion and a second portion having an area smaller than that of said first portion, and the second layer continuous to the first layer having a portion thereof exposed at said first principal surface, a first main electrode disposed on said first principal surface and making ohmic contact with said first portion of said first layer, a gate electrode disposed on said first principal surface adjacent to and spaced apart from said second portion of said first layer and making ohmic contact with the second layer, said gate electrode having a contact area with the second layer with an edge of substantial length, an auxiliary gate electrode disposed on said first principal surface adjacent to at least a part of said first portion and making ohmic contact with said second layer and at least a part of said second portion of said first layer, and a second main electrode disposed at a predetermined position on a selected one of said first and second principal surfaces, said second portion of said first layer defining between it and said second layer a PN junction adjacent to said gate electrode with an end portion thereof exposed at said first principal surface, the entirety of said exposed end portion of said PN junction extending substantially in parallel with the entirety of said edge of the contact area of said gate electrode with said second layer and being separated from said edge of said contact area by the semiconductor material of said second layer exclusively, wherein said second portion of said first layer comprises a first region extending away from said gate electrode to have a predetermined effective width measured from said junction, and a second region extending away from said gate electrode contiguous to said first region to have an effective width smaller than said predetermined effective width measured from said junction.

Dependencies are inferred from the claim text.