Wideband frequency multiplier particularly adapted for use in badge readers and the like

A frequency multiplier particularly adapted to respond to a variation in the pulse repetition rate between successive pulses of an input pulse train having a pulse repetition rate subject to variation, said frequency multiplier including:

• sawtooth voltage generator means responsive to said input pulse train having a repetition rate subject to variation, said sawtooth voltage generator means providing a sawtooth voltage waveform wherein the maximum voltage magnitude of each sawtooth bears a direct fixed mathematical relationship to the repetition rate of predetermined first and second ones of said pulses of said input pulse train;
• voltage storage means coupled to said sawtooth generator means, said voltage storage means successively sensing and storing the maximum voltage magnitude of each successive sawtooth of said sawtooth voltage waveform;
• voltage comparison means coupled to sawtooth voltage generator means and said voltage storage means, said voltage comparison means successively comparing the successive magnitudes of the voltage stored in said storage means with the instantaneous voltage value of the sawtooth following in time the sawtooth whose maximum voltage magnitude is stored in said storage means;
• logical circuit means coupled to said voltage comparison means, said logical circuit means being response to said voltage comparison means to provide an output pulse train having a repetition rate bearing a fixed predetermined mathematical relationship with the pulse repetition rate of said input pulse train, whereby the pulse repetition rate of said output pulse train tracks the pulse repetition rate of said input pulse train.

In a reader for reading magnetically encoded data on a record medium, where the reading of the magnetically encoded data requires relative motion between the record medium and a reading means, and the relative motion is subject to wide variation in the rate of movement, the provision of a timing circuit responsive to data read by said reading means to provide timing signals bearing a fixed time relationship to the reading of said data, said timing circuit comprising:

• a logical AND circuit having at least a first input, a second input and an output;
• frequency doubler circuit means, said frequency doubler circuit means includes, an input for receiving an input pulse train having a pulse repetition rate subject to variation, a first output for providing an output pulse train having a pulse repetition rate bearing a fixed mathematical relationship with the pulse repetition rate of said input train, said frequency doubler circuit means further including additional means for providing a further pulse train having a pulse repetition rate bearing a second fixed mathematical relationship with the pulse repetition rate of said input train;
• a logical AND circuit having a first input adapted to receive signals representative of said data read by said reading means, a second input adapted to receive said further pulse train from said frequency doubler circuit means, and an output for providing said input pulse train to the said input of said frequency doubler circuit means;
• whereby said output pulse train constitutes said timing signals which are continuously synchronized with the reading of the encoded data from the record medium.