US 4,057,822 AGranted

Channel type photo-electric energy transducer

AssigneeSharp Kabushiki Kaisha

InventorKenryo Watanabe

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Abstract

During the growth of an oxide on the surface of a P-type silicon semiconductor wafer, thermal oxidation of the semiconductor surface produces an N-channel region near the silicon/silicon dioxide interface by the conductivity inversion behavior, thereby establishing a PN junction barrier therebetween. By a photo-lithographic etching process, a heavily doped P-type diffusion region (that is, P.sup.+ region) operatively associated with the P-type semiconductor wafer, is disposed at the peripheral portion of the semiconductor wafer to surround the PN junction barrier and shield the same against the outside ambient atmosphere. Besides, a heavily doped N-type diffusion region (N.sup.+ region) is made up inside of the heavily doped P-type region in a manner to describe a closed loop. An electrode assembly includes metal contact layers having extensions over a dioxide which has been disposed between the P.sup.+ region and the N.sup.+ region during the fabrication procedure, so that the overlying electrode structure precludes the formation of an undesired N-channel region between the P.sup.+ and N.sup.+ diffusion regions.

An energy transducing semiconductor device comprising:

a semiconductor wafer of one conductivity type;
a first channel region of the other conductivity type opposite to that of the semiconductor wafer;
a junction barrier disposed between the wafer and the first channel region;
a first oxide disposed over the first channel region to protect the junction barrier against the outside ambient atmosphere;
a heavily doped first region having the same conductivity as that of the wafer, disposed so as to surround the peripheral portion of the wafer;
a heavily doped second region having the same conductivity as that of the first channel region, disposed so as to surround the peripheral portion of the junction barrier, the heavily doped second region having a looped structure inside of the heavily doped first region so as to define a closed loop, said heavily doped second region having a looped structure having at least one conductive bridging portion extending from one point on said looped structure to another point thereon disposed over the first oxide;
a second oxide disposed over the wafer in the space between the heavily doped first section and the heavily doped second region;
a second channel region of the same conductivity type as the first channel region disposed between the second oxide and the wafer, said second channel region being of such low concentration that leakage current between it and the heavily doped first region surrounding the peripheral portion of the wafer is substantially avoided, whereby dark current through the semiconductor device is determined only by leakage current between the wafer and the first channel region;
a first metal layer operatively associated with the heavily doped first region, having an extension over the second oxide;
a second metal layer operatively associated with the heavily doped second region, having an extension over the second oxide;
the first and second metal layers being disposed so as to have an isolation gap therebetween;
whereby the second oxide is overlaid with the first and second metal layers which have an isolation gap therebetween.

9 more elements

Abstract

Claims4