Process for fabricating monolithic circuits having matched complementary transistors and product

A monolithic integrated circuit having matched complementary transistors, comprising in combination:

• a. a substrate of one conductivity type having first and second diffused regions of opposite conductivity formed therein;
• b. an epitaxial layer overlying one surface of said substrate and said regions;
• c. a transistor of one polarity type overlying said first region and having a substantially completely retrograded impurity concentration profile collector region, said retrograded collector region extending from said first region through said epitaxial layer;
• d. a transistor of opposite polarity type overlying said second region;
• and
• e. a substantially completely retrograded impurity concentration profile isolation region circumscribing said second region and bounding the collector region of said opposite polarity type transistor;
• wherein
• f. said first region and said epitaxial layer electrically isolate said one polarity type transistor and said retrograded isolation region electrically isolates said opposite polarity type transistor.

A monolithic integrated circuit having matched complementary transistors, comprising in combination:

• a. a semiconductor substrate of one conductivity type having an epitaxial layer of material of opposite conductivity type formed thereover;
• b. a plurality of spaced diffused buried regions of said opposite conductivity type formed substantially within said substrate;
• c. a first transistor of one polarity type having:
• 1. an up-diffused collector region extending from a first buried region up and through said epitaxial layer, said collector region having a substantially completely retrograded impurity concentration profile in said epitaxial layer with a maximum impurity concentration along its surface that is contiguous with said first buried region and a minimum impurity concentration along its outer surface,
• 2. a diffused base region formed within said retrograded collector region, and
• 3. a diffused emitter region formed within said base region;
• d. an up-diffused isolation region circumscribing a second buried layer and extending from said substrate up and through said epitaxial layer, said isolation region having a substantially completely retrograded impurity concentration profile in said epitaxial layer with a maximum impurity concentration along its surface that is contiguous with said substrate and a minimum impurity concentration along is outer surface;
• and
• e. a second transistor of opposite polarity type having:
• 1. a diffused base region overlying but spaced from said second buried region,
• 2. a diffused emitter region formed within said base region, wherein
• 3. the portion of said epitaxial layer circumscribed by said retrograded isolation region is the collector region of said second transistor;
• whereby
• f. said first transistor is self-isolating and said second transistor is electrically isolated by said retrograded isolation region.

A process for fabricating a monolithic integrated circuit having matched complementary transistors, comprising the following steps:

• a. diffusing into a substrate of one conductivity type first and second regions of opposite conductivity type;
• b. depositing an impurity concentration into said first region to form a third region of said one conductivity type;
• c. depositing an impurity concentration into said substrate to form a fourth region of said one conductivity type circumscribing said second region;
• d. epitaxially forming a layer of material of said opposite conductivity type over said substrate and said regions;
• e. up-diffusing said third and fourth regions substantially through said epitaxial layer to form the collector region of one of said transistors of one polarity type having a substantially completely retrograded impurity concentration profile extending from said first region substantially through said epitaxial layer, and to form a sixth region having a substantially completely retrograded impurity concentration profile extending from said substrate substantially through said epitaxial layer, said sixth region circumscribing said second region and defining the collector region of the other of said transistors of opposite polarity type;
• f. diffusing a base region of said opposite conductivity type in said retrograded collector region of said one polarity type transistor;
• g. diffusing a base region of said one conductivity type in said collector region of said opposite polarity type transistor;
• h. diffusing an emitter region of said one conductivity type into said base region of said one polarity type transistor;
• and
• i. diffusing an emitter region of said opposite conductivity type into said base region of said opposite polarity type transistor.

A monolithic integrated circuit having matched complementary transistors comprising in combination:

• a. a transistor of one polarity type having a substantially completely retrograded impurity concentration profile throughout its collector region;
• and
• b. a isolation region having an impurity concentration profile substantially completely retrograded throughout circumscribing a transistor of opposite polarity type;
• wherein
• c. said one polarity type transistor is self-isolating and said opposite polarity type transistor is isolated by said retrograded isolation region.