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US 4,047,286 AGranted
Process for the production of semiconductor elements
AssigneeSiemens Aktiengesellschaft
InventorsUdo Lob, Fritz Scheidel
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AssigneeSiemens Aktiengesellschaft
InventorsUdo Lob, Fritz Scheidel
Estimating the term…
A process for the production of semiconductor elements is set forth which includes metallizing a side of a large-area semiconductor wafer, having at least two zones of differing conductivity types, applying a soft-solder plate to the metallized side of said large-area wafer, bringing a perforated plate with a desired pattern of holes against said soft-solder plate, said perforated plate being formed of a material which does not form an alloy with said soft-solder plate, subjecting said perforated plate to a load while said soft-solder is heated to its melting temperature, cooling said soft-solder plate and removing it, and subjecting said large-area semiconductor wafer to a sand blast which is directed against the side coated with the solder metal until the large-area wafer has been divided up. The stream of the sand on the said blast may be as wide as the large-area wafer. The metal layer formed on the large-area wafer is preferably formed as two nickel layers and a gold layer.
A method of manufacturing semiconductor elements which includes taking a large-area semiconductor wafer, forming at least two zones therein of different conductivity type, metallizing at least one side of said large area wafer, forming a soft-solder layer on one metallized side, bringing a perforated plate under pressure against said soft-solder layer while the soft-solder is raised to its melting temperature, the perforations in said perforated plate corresponding to the size and shape of the small-area wafers to be formed, whereby surfaces are formed some of which are covered by soft-solder and some of which are not covered by soft-solder, cooling the large-area wafer and withdrawing said perforated plate, subjecting the said surfaces to a sand blast with said soft-solder surfaces acting as a mask, thereby causing the unmasked non-soldered areas of said large area wafer to be removed leaving only the number of small areas still covered by the solder.
Dependencies are inferred from the claim text.