US 3,989,956 A · Charge transfer binary counter

Abstract

A two-phase charge transfer binary counter capable of counting the number of signal pulses in a particular time interval is described. The counter includes a charge storage medium in which is formed at least one charge storage "Q-cell" adapted to quantize each signal pulse into a charge packet. In tandem with the Q-cells are a plurality of one-bit shift registers each of which, except the last, comprises first and second charge storage cells connected in series. Adjacent cells of the same shift register are separated from one another by a threshold potential barrier of magnitude V.sub.T which permits only partial charge transfer thereacross. In contrast, adjacent cells of consecutive shift registers are separated from one another by a smaller transfer potential barrier of magnitude V.sub.B which permits virtually complete charge transfer thereacross. A feedback path is established between adjacent cells of the same shift register in order to clear residual charge from the first cell in response to charge transferred over its threshold barrier. At the end of the time interval, however, charge transfer ceases and the charge packets residing in the first cell of each shift register are the binary equivalent to the number of signal pulses in the time interval.

Claims18

Dependent claims

In a charge transfer binary counter for counting the number of signal pulses in a particular time interval up to a maximum of 2.sup.n - 1 pulses in the interval, a device comprising:

a charge storage medium,
a quantizer comprising first electrode means for forming in said medium at least one charge storage cell adapted to generate a predetermined packet of charge in response to each of said signal pulses,
second electrode means for forming in said tandem medium a plurality n of charge storage threshold cells coupled in tandem with one another and at least one of which is disposed to receive charge transferred out of said quantizer,
means for applying clock voltages to said first and second electrode means,
each of said threshold cells having at its input a first potential barrier across which virtually all charge transferred out of a preceding cell will transfer into said threshold cell upon the application of clock voltage from said applying means to said second electrode means and having at its output a second potential barrier, the area of each threshold cell and the height of its second barrier being mutually adapted in relation to the clock voltage so that charge transfer across the second barrier occurs only when two of said charge packets are transferred into said threshold cell, and
feeback means responsive to charge transferred across any of the first (n-1) of said second barriers for removing residual charge remaining in the corresponding threshold cells.

3 more elements

in a charge transfer binary counter for counting the number of signal pulses in a particular time interval up to a maximum of 2.sup.n - 1 pulses in the interval, a device comprising:

a charge storage medium,
a quantizer comprising first electrode means for forming in said medium at least one charge storage cell adapted to generate a predetermined packet of charge in response to each of said signal pulses,
second electrode means for forming in said medium at least (n-1) shift registers coupled in tandem to one another,
means for applying clock voltages to said first and second electrode means,
each of said shift registers comprising a charge storage threshold cell and contiguous thereto a charge storage transfer cell, a first potential barrier being located at the input to each threshold cell and a second potential barrier being located at the interface between said threshold and transfer cells, said first barrier adapted to permit virtually complete charge transfer thereacross in response to clock voltage applied thereto from said applying means, and the area of each threshold cell and the height of its second barrier being mutually adapted in relation to the clock voltage so that charge transfers thereacross only if two of said charge packets are transferred into said threshold cell.
each of said shift registers further including feedback means responsive to charge transferred across its second barrier for removing charge remaining in its threshold cell, and
a terminal threshold cell coupled to the output of the (n-1).sup.th shift register, another of said second barriers being located at the output of said terminal cell.

4 more elements

Dependencies are inferred from the claim text.

Charge transfer binary counter

Life of this patent

Charge transfer binary counter

Life of this patent

Abstract

Claims18