Frequency dividing network with odd integral step-down ratio
AssigneeSocieta Italiana Telecommunicazioni Siemens S.p.A.
InventorsUmberto Rossi, Pietro Basili
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Abstract
In order to convert a basic frequency by an odd integer K = 2n.+-.1, a square wave of that basic frequency is fed alternately over a noninverting and an inverting branch of a switching circuit to a pulse counter working into a decoder which emits a resetting pulse for the counter on every n.sup.th cycle. A flip-flop alternately set and reset by successive setting pulses feeds back a control signal to the switching circuit for a periodic reversal of the polarity of the incoming square wave either in the middle of the n.sup.th cycle, for K = 2n-1, or after a half-cycle delay from the end of the n.sup.th cycle, for K = 2n+1.
Claims5
A frequency-dividing network with a step-down ratio of 1:K where K is an odd integer, comprising:
- an input circuit connected to receive an incoming square wave of a basic frequency to be divided, said input circuit being provided with polarity-inverting means;
- a binary counter connected to said input circuit for receiving said incoming square wave therefrom;
- decoding means connected to said binary counter for generating a control pulse upon the occurrence of a predetermined number of half-cycles of said incoming square wave;
- resetting means for said binary counter connected to said decoding means and responsive to said control pulse;
- bistable means connected to said decoding means for alternate switchover between a first and a second operating condition by said control pulse, thereby producing an outgoing square wave of reduced frequency;
- and
- feedback means extending from said bistable means to said polarity-inverting means for activating and deactivating same in dependence upon the operating condition of said bistable means to provide a polarity reversal after every K half-cycles of said incoming square wave.
Dependencies are inferred from the claim text.