Method and system for achieving and sampling programmable tap weights in charge coupled devices

A circuit for selectively detecting and weighting signals stored at selected charge storage sites of a charge coupled device shift register having electrically continuous phase electrodes located adjacent charge storage sites including said selected charge storage sites of said shift register, wherein transfer of signal charge from one charge storage site to an adjacent site is effected by selective connection of said electrodes to clocked phase voltage sources for supplying current to charge said electrodes to a predetermined voltage, the charging current supplied to a particular electrode depending on the magnitude of signal charge stored at the charge storage site adjacent said electrode, said selective detecting and weighting circuit comprising:

• first and second supply voltage lines;
• for each electrode adjacent one of said selected charged storage sites
• circuit means for controlling supply of charging current for charging said electrode to said predetermined voltage, said circuit means including a first insulated gate field effect transistor having a channel connected between said phase electrode and said first supply voltage line;
• means for applying a predetermined first gate voltage to the gate of said first transistor to provide a desired clock voltage to said one phase electrode to supply through said first transistor charging current to said electrode;
• a second insulated gate field effect transistor having a channel connected between said one phase electrode and said second supply voltage line;
• means for applying an individually adjustable preselected second voltage not greater than said first gate voltage to the gate of said second transistor to control the percentage of charging current applied to said one phase electrode through said second transistor;
• and
• means common to all of said selected phase electrodes for detecting and integrating the charging currents applied to said phase electrodes by at least one of said first and second transistors in order to provide a weighted analog of the total signal charge stored adjacent said selected phase electrodes.

A circuit for selectively detecting and weighting signals stored at selected charge storage sites of a charge coupled device having electrically continuous phase electrodes located adjacent charge storage sites including said selected sites of said charge coupled device, wherein transfer of signal charge from one charge storage site to an adjacent site is effected by selective connection of said electrodes to clocked phase voltage sources for supplying current to electrodes so connected to charge said electrodes to a predetermined voltage, the charging current supplied to a particular electrode depending on the magnitude of signal charge stored at the charge storage site adjacent said electrode, said circuit comprising:

• a first insulated gate field effect transistor connected at its source to said phase electrode;
• means for applying a predetermined voltage to the gate of said first transistor;
• a first capacitor;
• first switch means operable during a first clock period to store a reference voltage on said first capacitor and to discharge said phase electrode to circuit ground;
• said first switch means operable during a second clock period to couple said first capacitor to the drain of said first transistor to apply charging current to said phase electrode;
• a second insulated gate field effect transistor connected at its source to said phase electrode;
• means for applying a variable bias voltage to the gate of said second transistor;
• a second capacitor;
• second switch means operable during the first clock period to store a reference voltage on said second capacitor;
• said second switch means operable during the second clock period to couple said second capacitor to the drain of said second transistor to apply charging current to said phase electrode;
• said first and second transistors supplying the total charging current for said phase electrode during said second clock period, said total charging current depending on the magnitude of signal charge stored at the storage site adjacent phase electrode and the proportion of said total charging current supplied by said second transistor being determined by said variable bias voltage;
• and
• circuit means for sensing the decrease in voltage on each of said first and second capacitors after said second clock period for generating respective signals representative of weighted samples of said signal charge stored at said charge storage site adjacent said phase electrode.

The method of sampling and weighting a signal stored in the form of a charge packet adjacent an electrically continuous phase electrode of a charge coupled device comprising:

• applying during a selected clock period a first clock to the drain of a first insulated gate field gate transistor connected at its source to said phase electrode;
• applying during said selected clock period a predetermined bias voltage to the gate of said first transistor;
• applying during said selected clock period a second clock to the drain of a second insulated gate field effect transistor connected at its source to said phase electrode;
• applying during said selected clock period an adjustable bias voltage of magnitude less than or equal to said predetermined bias voltage to the gate of said second transistor;
• such that said first and second transistors supply to said phase electrode a charging current dependent on the magnitude of said signal charge stored adjacent said electrode, to charge said electrode to a voltage dependent on said predetermined bias voltage, the proportion of said charging current supplied by said second transistor being controlled by said adjustable gate voltage;
• and detecting and integrating the amount of charging current supplied by one of said first and second transistors to provide a weighted sample of said signal stored adjacent said phase electrode.