Metal-insulator-semiconductor structure having means for canceling noise

An improved charge coupled device shift register comprising:

• a semiconductor substrate of one conductivity type;
• a relatively thin insulating layer extending over a surface of said substrate;
• a plurality of laterally spaced transfer electrodes over said insulating layer;
• first, second and third conductive clock lines selectively connected to said transfer electrodes;
• said clock lines disposed for receiving multi-phase clock pulses;
• first, second and third spaced apart regions of opposite conductivity type in said semiconductor substrate at the surface thereof underlying the insulating layer;
• said first region of opposite conductivity type disposed at one end of said plurality of transfer electrodes, input contact means ohmically connected with said first region for receiving input signal data, and input transfer electrode means for transferring charge corresponding to input signal data from said first region to a region of said semiconductor substrate beneath said one end of said plurality of laterally spaced transfer electrodes for transfer of said charge along said shift register in response to said clock pulses;
• said second region of opposite conductivity type disposed adjacent an opposite end of said plurality of laterally spaced electrodes;
• said third region being located adjacent said second region and spaced from said shift register and clock lines;
• output transfer electrode means operatively associated with said second region for transferring charge from said shift register at said opposite end of said plurality of laterally spaced transfer electrodes to said second region, and contact means ohmically connected to said second region for providing an output signal;
• contact means ohmically connected to said third region for providing an output signal generated by clock line noise propagated through said substrate to said third region of opposite conductivity type;
• and
• differential amplifier means connected to said shift register for differentially combining signals from said contact means connected to said second and third regions to produce an amplified signal having a substantially reduced clock line noise component;
• wherein said improvement comprises:
• disposition of said third region physically separate from said shift register and said clock lines and disposition of said output transfer electrode means physically and electrically separate from said third region, such that external coupling to said third region is provided only by said contact means ohmically connected to said third region for providing an output signal generated by clock line noise propagated to said third region through said semiconductor substrate.

An improved charge transfer device comprising:

• a semiconductor substrate of one conductivity type;
• a charge transfer device shift register defined on said substrate, an input pn junction, means for selectively coupling said input pn junction with said shift register to enter input data into said shift register, a plurality of conductive clock lines for controlling transfer of data along said shift register, an output diode, and transfer means for selectively coupling said output diode with said shift register for detecting charge corresponding to said data;
• noise reduction diode means defined in said substrate adjacent to said output diode and spaced from said shift register for receiving noise signals transmitted through said substrate during operation of said shift register;
• a differential amplifier connected with said shift register for differentially combining signals from said output data and from said noise reduction diode means to provide an amplified output signal having a reduced clock line noise component;
• wherein the improvement comprises
• disposition of said noise reduction diode means physically separate from such shift register, and disposition of said selective coupling means to provide coupling only between said output diode and said shift register such that said noise reduction diode means is responsive only to noise signals transmitted through said semiconductor substrate during operation of said shift register thereby to produce a noise output signal responsive to said noise signals.

A charge coupled device shift register comprising

• a semiconductor substrate of one conductivity type;
• a relatively thin insulating layer extending over a surface of said substrate;
• a plurality of electrically spaced transfer electrodes over said insulating layer;
• at least two clock lines selectively connected to said transfer electrodes, said clock lines extending transversally of said transfer electrodes for supplying multi-phase clock pulses to said electrodes;
• first and second spaced apart regions of opposite conductivity type in said semiconductor substrate at a surface thereof underlying said insulating layer;
• said first region of opposite conductivity type disposed at one end of said plurality of transfer electrodes;
• input contact means ohmically connected with said first region for receiving input signal data;
• input transfer electrode means for transferring charge corresponding to input signal data from said first region to a region of said semiconductor substrate beneath said one end of said plurality of laterally spaced transfer electrodes for transfer of said charge along said shift register in response to said clock pulses;
• said second region of opposite conductivity type disposed adjacent an opposite end of said plurality of laterally spaced transfer electrodes;
• output transfer electrode means operatively associated with said second region for transferring charge from said shift register at said opposite end of said plurality of laterally spaced transfer electrodes to said second region;
• and first conductor means ohmically connected to said second region for providing an output signal;
• a plurality of further regions of opposite conductivity type in said semiconductor substrate at the surface thereof underlying said insulating layer and disposed at said opposite end of said plurality of laterally spaced transfer electrodes, said further regions being physically separate from said shift register, said clock lines and said output transfer electrode and electrically coupled thereto only through said semiconductor substrate to receive only noise signals propagated through said semiconductor substrate during operation of said shift register, said further regions being spaced from said clock lines by an amount approximating the distance between said second region of opposite conductivity type and said clock lines;
• and wherein the only external electrical coupling to said further regions comprises a plurality of second electrical conductor means ohmically connected with respective ones of said further regions;
• and
• differential amplifier means connected to said shift register, said differential amplifier having a first input connected with said first conductor means and a second input connected to each of said plurality of second conductor means, said differential amplifier adapted to differentially combine signals at said first and second inputs thereof to produce an output signal substantially free of said clock line noise.