Semiconductor package and method

A semiconductor package comprising:

• a package substrate;
• a first redistribution structure bonded to the package substrate;
• a first semiconductor die over the first redistribution structure, wherein the first semiconductor die is electrically connected to the first redistribution structure;
• a first encapsulant along sidewalls of the first semiconductor die;
• a second redistribution structure over the first semiconductor die and the first encapsulant, wherein the first semiconductor die is electrically connected to the second redistribution structure;
• a second semiconductor die over the second redistribution structure, wherein the second semiconductor die is electrically connected to the second redistribution structure;
• a second encapsulant along sidewalls of the second semiconductor die;
• and
• a semiconductor layer over the second semiconductor die and the second encapsulant, wherein the semiconductor layer is a homogenous layer.

A semiconductor package comprising:

• a first interposer;
• an interconnect die on the first interposer, wherein the interconnect die comprises a first substrate, a first bonding layer on a first side of the first substrate, and a plurality of first bonding pads in the first bonding layer, and wherein the first bonding layer and the plurality of first bonding pads are bonded to the first interposer by metal-to-metal bonding and dielectric-to-dielectric bonding;
• a second interposer on a second side of the first substrate;
• a first semiconductor die and a second semiconductor die on the second interposer, wherein the first semiconductor die comprises a second substrate, a second bonding layer on a first side of the second substrate, and a plurality of second bonding pads in the second bonding layer, wherein the second bonding layer and the plurality of second bonding pads are bonded to the second interposer by metal-to-metal bonding and dielectric-to-dielectric bonding, wherein the first semiconductor die is thicker than the interconnect die, and wherein the interconnect die electrically connects the first semiconductor die and the second semiconductor die;
• and
• a first dielectric layer on a second side of the second substrate, wherein the first dielectric layer is in contact with the first semiconductor die.