Integrated Circuit Package With Improved Heat Dissipation Efficiency and Methods of Forming the Same

A device comprising:

• a first integrated circuit die comprising a semiconductor substrate and a conductive via extending into the semiconductor substrate, the semiconductor substrate having a back-side surface;
• a gap-filling layer laterally surrounding the first integrated circuit die, the gap-filling layer having a top surface lower than the back-side surface of the semiconductor substrate, the gap-filling layer being formed of a material having a thermal conductivity higher than 2 W/m·K and a coefficient of thermal expansion mismatch less than 1.3 μm/(m·K) with a material of the semiconductor substrate;
• a bonding film over the top surface of the gap-filling layer and laterally surrounding the conductive via;
• a second integrated circuit die over the first integrated circuit die and bonded to the back-side surface of the semiconductor substrate in a face-to-back manner;
• and
• a support substrate over the second integrated circuit die.

A method comprising:

• disposing a first integrated circuit die and a second integrated circuit die over a carrier substrate, wherein the first integrated circuit die comprises a substrate formed of a semiconductor material;
• forming a first gap-filling layer in a gap between the first integrated circuit die and the second integrated circuit die, wherein the first gap-filling layer is formed of a material selected from silicon, silicon carbide, silicon oxynitride, silicon nitride, the semiconductor material of the substrate, or a combination thereof;
• attaching a third integrated circuit die to the first integrated circuit die in a face-to-back manner;
• and
• forming a second gap-filling layer over the first gap-filling layer and laterally adjacent to the third integrated circuit die.