Semiconductor devices having crack detection structure

A semiconductor device, comprising:

• a first structure comprising a memory area;
• a second structure comprising a peripheral circuit area on the first structure in a vertical direction and at least partially overlapping the memory area;
• and
• a crack detection structure comprising:
• a plurality of crack detection lines disposed over the first structure and the second structure and at least partially surrounding the peripheral circuit area;
• an input pad on the second structure coupled with the plurality of crack detection lines;
• and
• an output pad on the second structure coupled with the plurality of crack detection lines;
• wherein crack detection lines of the plurality of crack detection lines are coupled with each other,
• wherein the second structure comprises:
• a semiconductor body comprising peripheral active areas;
• a rear insulating layer below the semiconductor body;
• a peripheral transistor in the peripheral circuit area and within the peripheral active areas, and comprising:
• a first peripheral source/drain;
• a second peripheral source/drain;
• a peripheral channel region between the first peripheral source/drain and the second peripheral source/drain;
• and
• a peripheral gate on the peripheral channel region;
• a peripheral insulation structure on the semiconductor body;
• a peripheral routing interconnection structure within the peripheral insulation structure and coupled with the peripheral transistor;
• and
• a peripheral contact plug in the peripheral circuit area, coupled with the peripheral routing interconnection structure, and at least partially penetrating through the semiconductor body and the rear insulating layer,
• wherein each crack detection line of the plurality of crack detection lines comprises:
• a lower detection interconnection structure within the first structure;
• an upper detection interconnection structure within the peripheral insulation structure;
• and
• a detection plug at least partially penetrating through the peripheral insulation structure below the upper detection interconnection structure, the semiconductor body and the rear insulating layer, and coupling the lower detection interconnection structure with the upper detection interconnection structure.

A semiconductor device, comprising:

• a first structure comprising a semiconductor substrate, and a first insulation structure at least partially covering the semiconductor substrate;
• a second structure on the first structure;
• and
• a crack detection structure comprising:
• a plurality of crack detection lines disposed over the first structure and the second structure;
• and
• at least one repeater between the plurality of crack detection lines,
• wherein crack detection lines of the plurality of crack detection lines are coupled with each other,
• wherein the second structure comprises:
• a semiconductor body comprising active areas;
• a rear insulating layer below the semiconductor body and in contact with the first insulation structure;
• transistors disposed within the active areas;
• and
• a second insulation structure at least partially covering the semiconductor body and the transistors,
• wherein the crack detection structure at least partially surrounds the transistors, and
• wherein the plurality of crack detection lines comprise:
• a lower detection interconnection structure within the first insulation structure;
• an upper detection interconnection structure within the second insulation structure;
• and
• a detection plug at least partially penetrating through a portion of the second insulation structure below the upper detection interconnection structure, the semiconductor body, the rear insulating layer, and a portion of the first insulation structure on the lower detection interconnection structure, and coupling the lower detection interconnection structure with the upper detection interconnection structure.