Image sensor

An image sensor comprising:

• a substrate comprising a pixel region, a first surface, and a second surface opposing the first surface;
• a buried insulating layer on the first surface;
• first to fourth sub-pixel regions arranged in a 2 x 2 matrix in the pixel region in a plan view;
• a first isolation trench encircling the first to fourth sub-pixel regions and penetrating the substrate;
• a source follower gate;
• and
• a selection gate,
• wherein each of the first to fourth sub-pixel regions comprises:
• a photoelectric conversion region;
• a first buried gate extending into the substrate from the first surface;
• a second buried gate extending into the substrate from the first surface;
• a gate connection disposed on the buried insulating layer and connecting the first buried gate and the second buried gate to each other;
• and
• a first contact vertically overlapping the first buried gate on the buried insulating layer and electrically coupled to the first buried gate, the second buried gate, and the gate connection,
• wherein the gate connections in each of the first to fourth sub-pixel regions are spaced apart from each other on the buried insulating layer in the plan view,
• wherein the source follower gate is disposed in the first sub-pixel region,
• wherein the selection gate is disposed in the second sub-pixel region, and
• wherein the photoelectric conversion regions in the first to fourth sub-pixel regions are electrically coupled to the source follower gate and the selection gate.

An image sensor comprising:

• a substrate comprising a pixel region, a first surface, and a second surface opposing the first surface;
• a buried insulating layer on the first surface;
• a floating diffusion region on the first surface;
• first to fourth sub-pixel regions arranged in a 2 x 2 matrix in the pixel region in a plan view;
• and
• a first isolation trench encircling the first to fourth sub-pixel regions and penetrating the substrate,
• wherein each of the first to fourth sub-pixel regions comprises:
• a photoelectric conversion region;
• N buried gates extending into the substrate from the first surface;
• a gate connection disposed on the buried insulating layer and connecting the N buried gates to each other;
• and
• M contacts vertically overlapping the N buried gates on the buried insulating layer and electrically coupled to the M buried gates and the gate connection,
• wherein the floating diffusion region is configured to store electric charges generated in the photoelectric conversion regions of the first to fourth sub-pixel regions, and
• wherein N and M are integers equal to or greater than 1, and N is greater than M.