Semiconductor devices having gate contact and related methods

A device comprising:

• a first device including:
• a first gate line overlapping a first active area of a substrate and overlapping an isolation structure adjacent the first active area;
• a first source/drain in the substrate immediately adjacent the first gate line;
• and
• a first contact on the first gate line and overlapping the isolation structure;
• and
• a second device including:
• a second gate line overlapping a second active area of the substrate separated from the first active area by the isolation structure;
• a second source/drain in the substrate immediately adjacent the second gate line;
• a second contact on the second gate line and overlapping the isolation structure;
• and
• a third contact on the second gate line and overlapping the second active area.

A method, comprising:

• forming a first active area of a substrate including forming an isolation structure in the substrate, the isolation structure being adjacent the first active area;
• forming a first gate line that extends along a first direction and overlaps the first active area and the isolation structure;
• forming a first source/drain adjacent the first gate line in the first active area;
• forming a first opening, a second opening and a third opening in a dielectric layer exposed by a mask layer, the first opening overlapping the first gate line and the isolation structure, the second opening overlapping the first gate line and the first active area, and the third opening overlapping the first source/drain;
• forming a first contact in the first opening and a third contact in the third opening;
• and
• forming a second contact in the second opening.