Mobile iot edge device using 3d-die stacking re-configurable processor module with 5g processor-independent modem

A mobile Internet-of-Things (IOT) edge device, comprising:

• a reconfigurable processor unit including
• a field-programmable gate array (FPGA);
• a reconfigurable memory device, the reconfigurable memory device including memory elements and control circuitry, the control circuitry being configured to control the memory elements to serve as storage memory at one time and as configuration memory at another time, the memory elements when serving as configuration memory storing configuration information for controlling the FPGA;
• and
• a processor configured to process data;
• and
• a processor-independent connectivity unit coupled to the reconfigurable processor unit, the processor-independent connectivity unit not including a processor to perform at least a subset of the connectivity unit processing functions, the processor-independent connectivity unit including
• an antenna;
• a radio-frequency circuit coupled to the antenna and configured to receive incoming signals and transmit outgoing signals over the antenna;
• and
• a system interface configured to transmit the incoming signals or data generated therefrom to the reconfigurable processor unit for processing, and configured to receive outgoing signals or data generated therefrom from the reconfigurable processor unit, the FPGA being configurable based on the configuration information to process the incoming signals or data generated therefrom, the FPGA being configurable to perform at times at least the subset of the connectivity unit processing functions on behalf of the processor-independent connectivity unit.

A method performed by a mobile Internet-of-Things (IoT) edge device, comprising:

• receiving incoming signals from an antenna by a Phy-layer on a processor-independent connectivity unit, the Phy-layer including a radio-frequency circuit, the processor-independent connectivity unit not including a processor to perform at least a subset of the connectivity unit processing functions;
• and
• transmitting the incoming signals or data generated therefrom by a system interface of the processor-independent connectivity unit to a reconfigurable processor unit for processing, the reconfigurable processor unit having a field-programmable gate array (FPGA) and a reconfigurable memory device, the reconfigurable memory device including memory elements and control circuitry, the control circuitry being configured to control the memory elements to serve as storage memory at one time and as configuration memory at another time, the memory elements when serving as configuration memory storing configuration information for controlling the FPGA, the reconfigurable processing unit further having a processor configured to process data, the FPGA being configurable based on the configuration information to process the incoming signals or data generated therefrom, the FPGA being configurable to perform at times at least the subset of the connectivity unit processing functions on behalf of the processor-independent connectivity unit.