Memory system, operating method thereof, and system

A system, comprising:

• a host configured to:
• transmit a configuration command which indicates to configure a first flag bit in a first controller to be in an enabled state;
• and
• a memory system comprising:
• a Peripheral Component Interconnect Express (PCIe) interface;
• the first controller configured to:
• in response to the configuration command, configure the first flag bit to be in the enabled state;
• and
• in response to the first flag bit being in the enabled state, generate a first data packet, and transmit the first data packet through the PCIe interface;
• and
• a second controller configured to:
• generate a second data packet, and transmit the second data packet through the PCIe interface, wherein an encapsulation format of the second data packet is different from an encapsulation format of the first data packet,
• wherein the memory system is coupled to the host through the PCIe interface, and both the first controller and the second controller are coupled to the PCIe interface.

An operating method of a memory system, comprising:

• in response to a configuration command, configuring a first flag bit in a first controller to be in an enabled state;
• in response to the first flag bit being in the enabled state, generating a first data packet, and transmitting the first data packet through a Peripheral Component Interconnect Express (PCIe) interface;
• and
• generating a second data packet, and transmitting the second data packet through the PCIe interface, wherein an encapsulation format of the second data packet is different from an encapsulation format of the first data packet.