Method for fabricating power semiconductor device and power semiconductor device

Abstract

A method for fabricating a power semiconductor device is provided, comprising: etching a substrate layer to form a first MESA region, a second MESA region, and a first trench; performing ion implantation at a bottom of the first trench, and activating implanted ions to form a doped ring on a side of the substrate layer close to the bottom of the first trench; forming a non-doped polysilicon layer at the bottom of the first trench, and performing ion implantation on the non-doped polysilicon layer to form a doped polysilicon layer; forming a source oxide layer, a source polysilicon layer, a gate oxide layer, and a gate polysilicon layer on a surface of the doped polysilicon layer in the first trench; and forming a source and a drain in the first MESA region and the second MESA region.

Dependencies are inferred from the claim text.