Memory Circuitry And Methods Used In Forming Memory Circuitry

Memory circuitry comprising:

• two memory-array regions individually comprising vertically-alternating insulative tiers and memory-cell tiers, an intervening region laterally between the two memory-array regions in a horizontal x-direction;
• a vertical trench in the two memory-array and intervening regions, the vertical trench being horizontally elongated in the horizontal x-direction in the two memory-array and intervening regions and extending horizontally from the two memory-array regions across the intervening region in the horizontal x-direction;
• digitlines in the vertical trench in the two memory-array regions that are spaced relative one another in the horizontal x-direction, insulative material in the vertical trench in the intervening region that comprises an insulative wall that extends across the intervening region in the horizontal x-direction;
• and
• the vertical trench in the intervening region having a narrowest portion in a horizontal y-direction that is narrower than a narrowest portion of the vertical trench in the horizontal y-direction in each of the two memory-array regions, the horizontal y-direction being perpendicular the horizontal x-direction.

Memory circuitry comprising:

• two memory-array regions individually comprising vertically-alternating insulative tiers and memory-cell tiers, memory cells in the memory-cell tiers that individually comprise a horizontal transistor having a gate comprising part of one of a plurality of access lines that individually directly electrically couple together multiple of the gates of different ones of the horizontal transistors that are in the same memory-cell tier, the access lines being horizontally elongated in a horizontal x-direction and spaced relative one another in a horizontal y-direction that is perpendicular the horizontal x-direction;
• an intervening region laterally between the two memory-array regions in the horizontal x-direction, the access lines extending from the two memory-array regions into the intervening region;
• and
• an insulative wall in the intervening region and that is horizontally elongated in the horizontal x-direction, the access lines individually having a portion in the intervening region having a horizontal outline that curves from the horizontal x-direction towards the horizontal y-direction and terminates directly against the insulative wall in the intervening region.