Digitally controlled oscillator biasing at minimum frequency

Abstract

A clock generation circuit has a ring oscillator configured to receive a bias current from a current source; and a proportional-to-absolute temperature (PTAT) current generation circuit configured to contribute an additional current to the bias current; and a source degeneration circuit comprising diode-connected transistors coupled to a source of a transistor in the PTAT current generation circuit. The diode-connected transistors may be coupled in parallel with a source degeneration resistor in the source degeneration circuit. The diode-connected transistors may be implemented using transistors of the same type as transistors in the ring oscillator. The diode-connected transistors may be included in a circuit that mimics an inverter circuit in the ring oscillator or may be coupled with one another in a parallel configuration. The diode-connected transistors may include a combination of P-type metal-oxide-semiconductor transistors and N-type metal-oxide-semiconductor transistors.

Dependencies are inferred from the claim text.