Logarithmic operator device having high accuracy

Abstract

A logarithmic operator device includes a memory, a register, a lookup table (LUT) circuit and a data conversion circuit. The memory stores input data. The register stores a plurality of offset values. The data conversion circuits reads the input data from the memory, identifies a most-significant-bit (MSB) position having a specific logical value from the input data, selects a first offset value from the offset values according to the MSB position, and shifts the input data according to the MSB position to generate shifted data. The LUT circuit selects first preprocessed data from a plurality of sets of preprocessed according to the shifted data. The data conversion circuit further generates a logarithmic operation output corresponding to the input data according to the first preprocessed data and the first offset value.

Dependencies are inferred from the claim text.