Semiconductor device
AssigneeSK hynix Inc.
InventorHeon Yong CHANG
Life of this patent
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Abstract
A semiconductor device including a substrate including a chip region; a passivation layer located on the substrate; a redistribution insulating layer on the passivation layer; redistribution trenches located in the chip region, extending through the redistribution insulating layer into the passivation layer, and disposed spaced apart from each other in a first direction of an upper surface of the substrate; and a redistribution conductive layer disposed on side surfaces of the redistribution trenches, and including an upper surface that is located between an upper surface of the redistribution insulating layer and lower surfaces of the redistribution trenches.
Claims20
A semiconductor device comprising:
- a substrate including a chip region;
- a passivation layer located on the substrate;
- a redistribution insulating layer on the passivation layer;
- redistribution trenches located in the chip region, extending through the redistribution insulating layer into the passivation layer, and disposed spaced apart from each other in a first direction of an upper surface of the substrate;
- and
- a redistribution conductive layer disposed on side surfaces of the redistribution trenches, and including an upper surface that is located between an upper surface of the redistribution insulating layer and lower surfaces of the redistribution trenches.
A semiconductor device comprising:
- a substrate including a chip region;
- a conductive layer on the substrate;
- a passivation layer on the conductive layer;
- a redistribution insulating layer on the passivation layer;
- redistribution trenches located in the chip region, penetrating the redistribution insulating layer and the passivation layer, and overlapping with the conductive layer;
- and
- a redistribution conductive layer disposed on side surfaces of the redistribution trenches, and including an upper surface that is located between an upper surface of the redistribution insulating layer and lower surfaces of the redistribution trenches.
A semiconductor device comprising:
- a conductive layer on a substrate;
- a passivation layer on the conductive layer;
- a redistribution insulating layer on the passivation layer;
- redistribution trenches located in a chip region of the substrate, passing through the redistribution insulating layer and the passivation layer, and overlapping with the conductive layer;
- a redistribution conductive layer disposed on side surfaces of the redistribution trenches, the redistribution conductive layer including an upper surface that is located between an upper surface of the redistribution insulating layer and a lower surface of the redistribution trenches, and
- a guard ring disposed in a guard ring region of the substrate,
- wherein the redistribution trenches overlap with the guard ring, and
- wherein the guard ring includes a guard conductive layer that is disposed under the redistribution trenches, and at least a portion of the redistribution conductive layer contacts an upper surface of the guard conductive layer.
Dependencies are inferred from the claim text.