Semiconductor device including deep trench capacitor
AssigneeDB HiTek Co., Ltd.
InventorsChang Hun HAN, In Geun YEO, Do Hee KIM, Dong Uk SHIN
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Abstract
A semiconductor device including a deep trench capacitor is configured such that deep trench capacitor patterns of multiple cells are symmetric to each other along a longitudinal central shaft and a widthwise central shaft of the cells, thereby preventing warpage due to tensile stresses applied to a substrate. The semiconductor device includes a cell comprising multiple unit cells, each of the multiple unit cells including multiple deep trench capacitors spaced from each other on a substrate, wherein the multiple unit cells are arranged in multiple rows and multiple columns.
Claims20
A semiconductor device including a deep trench capacitor, the semiconductor device comprising:
- a cell comprising multiple unit cells, each of the multiple unit cells comprising multiple deep trench capacitors spaced from each other on a substrate,
- wherein the multiple unit cells are arranged in multiple rows and multiple columns.
A semiconductor device including a deep trench capacitor, the semiconductor device comprising:
- a cell comprising multiple unit cells, each of the multiple unit cells comprising multiple deep trench capacitors spaced from each other on a substrate, the multiple unit cells being arrayed in two rows by two columns,
- wherein each deep trench capacitor comprises:
- a deep trench extending from a surface of the substrate to a predetermined depth;
- an insulator film disposed on a bottom surface and an inner side wall of the deep trench;
- a conductive layer disposed on the insulator film;
- and a dielectric layer disposed on the conductive layer, and
- wherein the cell comprises:
- a first unit cell at a first row and a first column;
- a second unit cell at the first row and a second column;
- a third unit cell at a second row and the first column;
- and a fourth unit cell at the second row and the second column.
Dependencies are inferred from the claim text.