Microelectronic devices including vertical channel access devices, and related methods and memory devices

A memory device, comprising:

• a memory cell comprising:
• a vertical channel access device comprising:
• a channel region vertically interposed between two source/drain regions;
• a gate electrode horizontally offset from and vertically overlapping the channel region;
• and
• a gate dielectric material horizontally interposed between the channel region and the gate electrode and vertically overlapping the channel region and at least part of the two source/drain regions;
• a storage node device vertically offset from and coupled to the vertical channel access device;
• and
• a dipole-forming material physically contacting a sidewall of the gate dielectric material of the vertical channel access device of the memory cell and substantially confined within a vertically extent of one of the two source/drain regions of the vertical channel access device of the memory cell, differences in electric properties of the dipole-forming material and the gate dielectric material effectuating a net positive charge at an interface of the dipole-forming material and the gate dielectric material.