Semiconductor devices

A semiconductor device comprising:

• a substrate;
• a first stack and a second stack disposed on the substrate and spaced apart from each other in a first direction parallel to a top surface of the substrate;
• and
• a first conductive line and a second conductive line extending in the first direction and spaced apart from each other in a third direction perpendicular to the first direction and parallel to the top surface of the substrate,
• wherein the first stack includes a first gate electrode extending in a second direction perpendicular to the top surface of the substrate,
• wherein the second stack includes a second gate electrode extending in the second direction,
• wherein the first conductive line is overlapped with the first gate electrode in the second direction,
• wherein the second conductive line is overlapped with the second gate electrode in the second direction,
• wherein each of the first stack and the second stack comprises:
• channel patterns enclosing a side surface of the first and second gate electrodes and spaced apart from each other in the second direction;
• and
• a data storage layer interposed between each of the channel patterns and the first and second gate electrodes, and
• wherein the first gate electrode and the second gate electrode are offset from each other in the third direction.

A semiconductor device comprising:

• a substrate;
• a first stack and a second stack disposed on the substrate, spaced apart from each other in a first direction parallel to a top surface of the substrate, and each including a gate electrode extending in a second direction perpendicular to the top surface of the substrate;
• and
• a first conductive line and a second conductive line spaced apart from each other in a third direction perpendicular to the first direction and parallel to the top surface of the substrate, and extending obliquely to both the first direction and the third direction,
• wherein the gate electrode of the first stack and the gate electrode of the second stack are aligned with each other in the first direction,
• wherein the first conductive line is overlapped with the gate electrode of the first stack in the second direction,
• wherein the second conductive line is overlapped with the gate electrode of the second stack in the second direction, and
• wherein each of the first stack and the second stack comprises:
• channel patterns enclosing a side surface of the gate electrode and spaced apart from each other in the second direction;
• and
• a data storage layer interposed between each of the channel patterns and the gate electrode.