System and method for automated dynamic characterization of hybrid switches and busbar for use therewith

A method for dynamically characterizing switching behavior of power semiconductors, the method comprising:

• storing, in one or more storage devices, a first plurality of different sets of test parameters to be tested on a first power semiconductor switch of a first type and a second power semiconductor switch of a second type, each of the first plurality of different sets of test parameters comprising a gate turn-on order for the first and second power semiconductor switches, a gate turn-off order for the first and second power semiconductor switches, a delay on duration, and a delay off duration, the first plurality of different sets of test parameters having a first resolution;
• retrieving, by one or more processing elements, the first plurality of different sets of test parameters one at a time from the one or more storage devices;
• for each of the first plurality of different sets of test parameters retrieved by the one or more processing elements, receiving, by one or more gate drivers, one or more signals from the one or more processing elements corresponding to a retrieved set of test parameters;
• turning, by the one or more gate drivers, the first and second power semiconductor switches on and off according to the retrieved set of test parameters;
• for each of the first plurality of different sets of test parameters retrieved by the one or more processing elements, capturing, by a data capture device to, data from the first and second power semiconductor switches as the first and second power semiconductor switches turn on and off;
• for each of the first plurality of different sets of test parameters retrieved by the one or more processing elements, analyzing, by the one or more processing elements, the captured data to determine at least a corresponding turn-on switching energy loss (Eon) and a corresponding turn-off switching energy loss (Eoff);
• after the Eon and Eoff are determined for each of the first plurality of different sets of test parameters, identifying, by the one or more processing elements, a sub-range of the first plurality of different sets of test parameters in which the Eon and Eoff are lower than in others of the first plurality of different sets of test parameters;
• creating, by the one or more processing elements, a second plurality of different sets of test parameters covering the identified sub-range of the first plurality of different sets of test parameters, each of the second plurality of different sets of test parameters comprising a gate turn-on order for the first and second power semiconductor switches, a gate turn-off order for the first and second power semiconductor switches, a delay on duration, and a delay off duration, the second plurality of different sets of test parameters having a second resolution higher than a first resolution of the first plurality of different sets of test parameters;
• storing, by the one or more storage devices, the second plurality of different sets of test parameters;
• retrieving, by the one or more processing elements, the second plurality of different sets of test parameters one at a time from the one or more storage devices;
• for each of the second plurality of different sets of test parameters retrieved by the one or more processing elements, receiving, by the one or more gate drivers receives, one or more signals from the one or more processing elements corresponding to a retrieved set of test parameters;
• turning, by the one or more gate drivers, the first and second power semiconductor switches on and off according to the retrieved set of test parameters;
• for each of the second plurality of different sets of test parameters retrieved by the one or more processing elements, capturing, by the data capture device, data from the first and second power semiconductor switches as the first and second power semiconductor switches turn on and off;
• for each of the second plurality of different sets of test parameters retrieved by the one or more processing elements, analyzing, by the one or more processing elements, the captured data to determine at least a corresponding turn-on switching energy loss (Eon) and a corresponding turn-off switching energy loss (Eoff);
• and
• determining, by the one or more processing elements, which of the second plurality of different sets of test parameters corresponds to a lowest Eon and a lowest Eoff.

A busbar assembly comprising:

• a front busbar having an elongated top conductor, and elongated middle conductor substantially parallel to the top conductor, and an elongated bottom conductor substantially parallel to the top conductor and the middle conductor;
• a planar rear busbar positioned substantially parallel to the front busbar and electrically connected to the bottom conductor of the front busbar;
• and
• a planar insulator positioned between the front busbar and the rear busbar;
• wherein the front busbar is adapted to receive a plurality of high side switching devices mounted to the top conductor and the middle conductor;
• and
• wherein the front busbar is adapted to receive a plurality of low side switching devices mounted to the middle conductor and the bottom conductor.