US 2026/0280536 A1 · INPUT BUFFER CIRCUIT

Abstract

An integrated circuit includes an upper threshold circuit and a lower threshold circuit each configured to receive an input voltage signal. The integrated circuit also includes a control circuit configured to change an output voltage signal in response to a condition that a first enabling signal received from the upper threshold circuit and a second enabling signal received from the lower threshold circuit change logic levels consecutively. The control circuit includes a first switch, a second switch, and a regenerative circuit. The first switch is controlled by the first enabling signal, and the second switch is controlled by the second enabling signal. The regenerative circuit is configured to maintain the output voltage signal at a connection between the first switch and the second switch while each of the first switch and the second switch is at a disconnected state.

Claims20

Dependent claims

An integrated circuit comprising:

an upper threshold circuit and a lower threshold circuit each configured to receive an input voltage signal;
and
a control circuit configured to change an output voltage signal in response to a condition that a logic level of a first enabling signal received from the upper threshold circuit and a logic level of a second enabling signal received from the lower threshold circuit are changed consecutively, wherein the control circuit comprises,
a first switch configured as being controlled by the first enabling signal,
a second switch configured as being controlled by the second enabling signal, and
a regenerative circuit configured to maintain the output voltage signal at a connection between the first switch and the second switch while each of the first switch and the second switch is at a disconnected state.

3 more elements

Dependencies are inferred from the claim text.

Input buffer circuit

Life of this patent

Input buffer circuit

Life of this patent

Abstract

Claims20