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US 2026/0267806 A1Published application
Electronic device including device-dedicated and host memory regions
AssigneeXCENA Inc.
InventorsJu Hyun KIM, Dohun KIM, Jae Wan YEON, Kee Bum SHIN
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Abstract
An electronic device includes a memory including a first region and a second region associated with a host memory, and a controller configured to be connected to the memory, wherein the controller is configured to access the first region based on a physical addressing scheme, and access the second region based on a virtual addressing scheme.
Claims20
An electronic device comprising:
- a memory comprising a first region and a second region, the second region being associated with a host memory of a host device;
- and
- a controller circuit configured to be connected to the memory,
- wherein the controller circuit is configured to:
- based on a value of a specific address bit received from a host processor of the host device, determine:
- whether to access the first region based on a physical addressing scheme, or
- whether to access the second region based on a virtual addressing scheme, and
- access, based on the determination, at least one of the first region or the second region.
5 more elements
A computing system comprising:
- a host device comprising a host processor and a host memory;
- and
- an electronic device,
- wherein the electronic device comprises:
- a memory comprising a first region and a second region, the second region being associated with the host memory;
- and
- a controller circuit configured to be connected to the memory and the host processor, and wherein the controller circuit is configured to:
- based on a value of a specific address bit received from the host processor, determine:
- whether to access the first region based on a physical addressing scheme, or
- whether to access the second region based on a virtual addressing scheme, and
- access, based on the determination, at least one of the first region or the second region.
8 more elements
An electronic device comprising:
- a memory comprising a first region and a second region, wherein the second region is associated with a host memory of a host device;
- and
- circuitry coupled to the memory, the circuitry configured to:
- determine, based on a value of a specific address bit received from a host processor of the host device,
- whether to access the first region based on a physical addressing scheme, or
- whether to access the second region based on a virtual addressing scheme,
- access the second region based on the virtual addressing scheme when the value of the specific address bit is a first value, and
- access the first region based on the physical addressing scheme when the value of the specific address bit is a second value.
5 more elements
Dependencies are inferred from the claim text.