Semiconductor package and method of manufacturing the semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorDaewoong HEO
Life of this patent
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AssigneeSamsung Electronics Co., Ltd.
InventorDaewoong HEO
Estimating the term…
There is provided a semiconductor package including a first redistribution wiring layer having a chip mounting region and a peripheral region surrounding the chip mounting region, and the first redistribution wiring layer has first redistribution wires stacked in at least two layers. A first semiconductor device is mounted on the chip mounting region on the first redistribution wiring layer. A sealing member is formed on the first redistribution wiring layer to cover the first semiconductor device. A plurality of conductive connectors is formed on the peripheral region, and the conductive connectors penetrate the sealing member and are electrically connected to the first redistribution wires. A plurality of through openings extending from an upper surface of the sealing member is formed on the chip mounting region and exposes an upper surface of the first semiconductor device. The through openings are filled up with a conductive material to form a plurality of heat transfer plugs.
A semiconductor package, comprising:
A semiconductor package comprising:
A semiconductor package, comprising:
Dependencies are inferred from the claim text.