Electrostatic discharge device in stacked nanosheet transistors

A method for fabrication of a semiconductor device, the method comprising:

• forming a top device comprising:
• forming a top N-type doped region and a top P-type doped region separated by a top gate region;
• and
• forming a first frontside contact and a second frontside contact over the top N-type doped region and the top P-type doped region, respectively;
• forming a bottom device comprising:
• forming a bottom P-type doped region and bottom N-type doped region separated by a bottom gate region;
• and
• forming a first backside contact and a second backside contact below the bottom N-type doped region and the bottom P-type doped region, respectively;
• and
• forming a well region electrically connecting the top device to the bottom device.

A semiconductor device, comprising:

• a top device comprising a top N-type doped region and a top P-type doped region separated by a top gate region;
• a bottom device comprising a bottom P-type doped region and bottom N-type doped region separated by a bottom gate region;
• and
• a well region electrically connecting the top device to the bottom device.