Side-channel protection cache lines shared by security domains
AssigneeIntel Corporation
InventorsThomas UNTERLUGGAUER, Carlos Rozas, Gilles POKAM, Fangfei LIU, Scott CONSTABLE, Raghunandan MAKARAM
Life of this patent
Estimating the term…
Loading patent…
AssigneeIntel Corporation
InventorsThomas UNTERLUGGAUER, Carlos Rozas, Gilles POKAM, Fangfei LIU, Scott CONSTABLE, Raghunandan MAKARAM
Estimating the term…
A processor or other apparatus of an aspect includes a cache to store cache lines and a circuitry coupled with the cache. The circuitry is to receive a memory access request for data at a memory address from a first security domain. The data at the memory address is to be shared by a plurality of security domains including the first security domain. A side-channel protection is to be used for the data. The circuitry is to implement the side-channel protection for the data. This includes not providing a cache line corresponding to the memory address from the cache to the first security domain, when the cache line exists in the cache and is valid, if the first security domain has not previously accessed the cache line in the cache. Other processors, methods, systems, and instructions are disclosed.
An apparatus comprising:
A method comprising:
A non-transitory machine-readable storage medium, the non-transitory machine-readable storage medium storing instructions of a virtual machine monitor (VMM) that, if executed by a machine, are to cause the machine to perform operations, the operations including to:
Dependencies are inferred from the claim text.